Patents by Inventor Didier Bouvet

Didier Bouvet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090146194
    Abstract: The local bending of a silicon nanowire induces tensile strain in the wire due to the stretching of the silicon lattice. This in turn enhances the mobility of the free carriers (electrons) in the direction of transport along the wire. Thus, for example, when Gate-All-Around MOSFETs are fabricated along the nanowire, the mobility enhancement will translate into an improvement in the performance (current drive, speed) of the silicon nanowire MOSFETs. In summary, a semiconductor device comprises a substrate and a nanowire in connection with the substrate at a drain and at a source region, and the nanowire is bent to achieve enhanced mobility of charge carriers.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 11, 2009
    Applicant: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
    Inventors: Kirsten MOSELUND, Mihai Adrian Ionescu, Didier Bouvet
  • Publication number: 20070298551
    Abstract: The invention relates to methods for manufacturing semiconductor devices. Processes are disclosed for implementing suspended single crystal silicon nano wires (NWs) using a combination of anisotropic and isotropic etches and spacer creation for sidewall protection. The core dimensions of the NWs are adjustable with the integration sequences: they can be triangular, rectangular, quasi-circular, or an alternative polygonal shape. Depending on the length of the NWs, going from the sub-micron to millimeter range, the NWs may utilize support from anchors to the side, during certain processing steps. By changing the lithographic dimensions of the anchors compared to the NWs, the anchors may be reduced or eliminated during processing. The method covers, among other things, the integration of Gate-All-Around NW (GAA-NW) MOSFETs on a bulk semiconductor.
    Type: Application
    Filed: February 12, 2007
    Publication date: December 27, 2007
    Applicant: Ecole Polytechnique Federale De Lausanne (EPFL)
    Inventors: Didier Bouvet, Kirsten Moselund, Mihai Ionescu
  • Publication number: 20070217120
    Abstract: A microelectrical device comprising two generally parallel electrodes (20,21) at least one of which is movable, and at least one of the electrodes comprising a layer of a semiconductor presenting space charge characteristics. The electrodes have a closed position an open position. A spring effect biases the movable electrode (21) towards the open position. When the movable electrode (21) is closed by a first voltage pulse (P1) a sufficiently high space charge density (10) is generated to hold the movable electrode (21) closed. When zero voltage is applied the movable electrode (21) is held closed by the built in space charge until the application of a second voltage pulse (P2) which decreases the space charge in the semiconductor (10) to allow the movable electrode(s) to be moved to the open position by the spring effect.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 20, 2007
    Inventors: Jean-Michel Sallese, Didier Bouvet
  • Patent number: 7077727
    Abstract: Abrasive composition for the chemical-mechanical polishing in one stage of substrates used in the microelectronics semiconductors industry containing at least one metal layer and one insulator layer, comprising an acid aqueous suspension of individualized particles of colloidal silica, not linked to each other by siloxane bonds, having a mean particle diameter of between 5 and 20 nm and an oxidizing agent, and chemical-mechanical polishing process using such a composition.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: July 18, 2006
    Assignee: AZ Electronic Materials USA Corp.
    Inventors: Eric Jacquinot, Didier Bouvet, Patrice Beaud
  • Publication number: 20060125746
    Abstract: A microelectrical device has a ferroelectric layer (10) between parallel electrodes (20,21) at least one of which (21) is movable. The electrodes have a closed position in which the ferroelectric layer (10) is sandwiched between the two electrodes (21,21) and an open position in which the movable electrode (21) is spaced from the ferroelectric layer (10). A spring effect biases the movable electrode (21) towards the open position. When the movable electrode (21) is closed by a first voltage pulse (P1) the ferroelectric layer (10) is polarized to hold the movable electrode (21) closed. When zero voltage is applied the movable electrode (21) is held closed by remnant polarization of the ferroelectric material until the application of a second voltage pulse (P2) which cancels the remnant polarization of the ferroelectric material (10) to allow the movable electrode(s) to be moved to the open position by the spring effect.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 15, 2006
    Inventors: Jean-Michel Sallese, Paul Muralt, Didier Bouvet
  • Publication number: 20050085166
    Abstract: Abrasive composition for the chemical-mechanical polishing in one stage of substrates used in the microelectronics semiconductors industry containing at least one metal layer and one insulator layer, comprising an acid aqueous suspension of individualized particles of colloidal silica, not linked to each other by siloxane bonds, having a mean particle diameter of between 5 and 20 nm and an oxidizing agent, and chemical-mechanical polishing process using such a composition.
    Type: Application
    Filed: February 2, 2003
    Publication date: April 21, 2005
    Inventors: Eric Jacquinot, Didier Bouvet, Patrice Beaud