Patents by Inventor Diego Tonini

Diego Tonini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11887934
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: January 30, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent DiCaprio, Kyuil Cho
  • Publication number: 20240021533
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: July 31, 2023
    Publication date: January 18, 2024
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Patent number: 11715700
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: August 1, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20230187370
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 15, 2023
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Patent number: 11521935
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11476202
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 18, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11398433
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 26, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11264331
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: March 1, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11264333
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 1, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20210257306
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: April 12, 2021
    Publication date: August 19, 2021
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20210257307
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: April 12, 2021
    Publication date: August 19, 2021
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Patent number: 10886232
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: January 5, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent DiCaprio, Kyuil Cho
  • Publication number: 20200411712
    Abstract: A method for processing a solar cell structure includes providing a solar cell structure (10) having a first side (12) and a second side (14). The method includes at least one of (a) scribing the solar cell structure on the first side of the solar cell structure and (b) cutting through the solar cell structure using a laser beam incident on the first side of the solar cell structure. The method includes providing an adhesive (32) on the second side of the solar cell structure.
    Type: Application
    Filed: February 8, 2018
    Publication date: December 31, 2020
    Inventors: Marco GALIAZZO, Luigi DE SANTI, Daniele GISLON, Diego TONINI, Giorgio CELLERE
  • Publication number: 20200395306
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200395305
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200395304
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: May 8, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200357749
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: November 18, 2019
    Publication date: November 12, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200357750
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: January 17, 2020
    Publication date: November 12, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20130093441
    Abstract: A testing device (100) is disclosed for testing wafers (11), comprising a measuring head (10) provided with three functional blocks (12, 13, 14), each able to move independently from the others, to carry out different resistive measurements on a cell or wafer (11). Each of the functional blocks (12, 13, 14) supports respective measuring probes (15), suitable to be placed into contact with metallization lines or fingers (16), made on the wafers (11).
    Type: Application
    Filed: October 8, 2012
    Publication date: April 18, 2013
    Applicant: APPLIED MATERIALS ITALIA S.R.L.
    Inventors: Diego Tonini, Alessandro Voltan, Marco Galiazzo, Marco Martire
  • Publication number: 20130095578
    Abstract: Embodiments of the invention may provide a system for the production of photovoltaic modules that comprises at least a first work line having a plurality of positioning stations in which a series of first processing operations are performed and a second work line consisting of at least a positioning station in which at least a second processing operation is performed. The process sequence may include, for example, printing a layer material used to form one or more electric contacts on a base layer, and then positioning photovoltaic cells and various layers of insulating material in a desired orientation over the base layer to form a photovoltaic module.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 18, 2013
    Inventors: Andrea Baccini, Marco Gajotto, Thomas Micheletti, Diego Tonini, John Telle, Marco Maiolini, Andrea Sartoretto