Abstract: A binary signal comparator for comparing the level of an unknown signal to a reference signal during a time window period has a first flip-flop for detecting a difference at the start of the period and a second flip-flop for detecting a difference at any later time during the period. The outputs of the two flip-flops are combined in an OR combination so that the final output produces a comparison of the two signals during the entire time window period.

Abstract: A read/write circuit for a random access memory comprises mode switching means for placing the memory into a read mode if an external read request signal is received and for placing the memory into a write mode if an external write request signal is received. A priority circuit controls said mode switching means and prevents it from placing the memory into the read mode as long as a write request signal is present and enables said mode switching means for placing the memory into the read mode after each write operation has been completed. A read-out control circuit is responsive to the read request signal for enabling a read operation at the next following read mode enabling and for repeating the read operation at the subsequent read mode enabling if the read operation was not completed before the termination of the read mode enabling.