Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.

Abstract: A method of manufacturing a batch of component carriers is disclosed. The method includes providing a plurality of separate wafer structures, each comprising a plurality of electronic components, simultaneously laminating the wafer structures with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and singularizing a structure resulting from the laminating into the plurality of component carriers, each comprising at least one of the electronic components, a part of the at least one electrically conductive layer structure and a part of the at least one electrically insulating layer structure.

Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.

Abstract: A method of manufacturing a batch of component carriers is disclosed. The method includes providing a plurality of separate wafer structures, each comprising a plurality of electronic components, simultaneously laminating the wafer structures with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and singularizing a structure resulting from the laminating into the plurality of component carriers, each comprising at least one of the electronic components, a part of the at least one electrically conductive layer structure and a part of the at least one electrically insulating layer structure.

Abstract: A semifinished product includes a base structure, wafer structures, a cover structure and a further cover structure. The base structure has an electrically conductive layer and/or an electrically insulating layer. The wafer structures are on the base structure and have electronic components. The cover structure has at least one further layer and covers the wafer structures and part of the base structure. Separate electronic components are arranged on the cover structure and a further cover structure is provided to cover the separate electronic components and part of the cover structure. A component carrier includes a bare die with pads. The bare die is laminated between a base laminate and a cover laminate and has a lateral semiconductor surface being exposed from the base laminate and the cover laminate. A redistribution layer increases spacing of external electric contacts relative to spacing between pads of the bare die.

Abstract: A method of manufacturing a batch of component carriers is disclosed. The method includes providing a plurality of separate wafer structures, each comprising a plurality of electronic components, simultaneously laminating the wafer structures with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and singularizing a structure resulting from the laminating into the plurality of component carriers, each comprising at least one of the electronic components, a part of the at least one electrically conductive layer structure and a part of the at least one electrically insulating layer structure.

Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit regions, wherein the printed circuit board regions each compromise at least one conductive layer and/or at least one device or once conductive component, wherein printed circuit board regions to be connected to another one, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions, at least one additional layer or ply of the printed circuit board is applied over the printed circuit board regions, the additional layer is embodied as a conductive layer, which is contact-connected via plated-through holes to conductive layers or devices or components integrated in the printed circuit board regions.

Abstract: A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1?) and application of a dielectric insulating foil (3, 3?) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4?) to the insulating layer (3, 3?); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1?) plus insulating layer (3, 3?) and conducting paths (4, 4?) by interposing a prepreg layer (5, 85; 18, 18?), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.

Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit regions, wherein the printed circuit board regions each compromise at least one conductive layer and/or at least one device or once conductive component, wherein printed circuit board regions to be connected to another one, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions, at least one additional layer or ply of the printed circuit board is applied over the printed circuit board regions, the additional layer is embodied as a conductive layer, which is contact-connected via plated-through holes to conductive layers or devices or components integrated in the printed circuit board regions.

Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit regions, wherein the printed circuit board regions each comprise at least one conductive layer and/or at least one device or one conductive component, wherein printed circuit board regions to be connected to one another, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions, at least one additional layer or ply of the printed circuit board is applied over the printed circuit board regions, the additional layer is embodied as a conductive layer, which is contact-connected via plated-through holes to conductive layers or devices or components integrated in the printed circuit board regions.

Abstract: In a method for mounting an element or component having at least one metal surface in or on a circuit board containing at least one conducting layer made of metal material, a connection between the at least one metal surface of the element and the at least one conducting layer of the circuit board is formed using ultrasonic welding or high-frequency friction welding in order to create a mechanically stable and resistant connection or attachment having good conductivity. Furthermore, a circuit board is disclosed in which at least one element or component having a metal surface is or can be connected to a conducting or conductive layer of the circuit board using ultrasonic welding or high-frequency friction welding.

Abstract: In a method for mounting an element or component having at least one metal surface in or on a circuit board containing at least one conducting layer made of metal material, a connection between the at least one metal surface of the element and the at least one conducting layer of the circuit board is formed using ultrasonic welding or high-frequency friction welding in order to create a mechanically stable and resistant connection or attachment having good conductivity. Furthermore, a circuit board is disclosed in which at least one element or component having a metal surface is or can be connected to a conducting or conductive layer of the circuit board using ultrasonic welding or high-frequency friction welding.

Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit regions, wherein the printed circuit board regions each comprise at least one conductive layer and/or at least one device or one conductive component, wherein printed circuit board regions (20, 21, 22) to be connected to one another, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions (20, 21, 22) to be connected to one another, at least one additional layer or ply of the printed circuit board is arranged or applied over the printed circuit board regions (20, 21, 22) to be connected to one another, it is provided that the additional layer is embodied as a conductive layer (26), which is contact-connected via plated-through holes (23) to conductive layers or devices or components integrated in the printed circuit board regions (20, 21, 22) to be co