Abstract: According to the invention, a circuit for reducing the crest factor is provided: (A) with a transmit path with a data symbol to be transmitted; (B) with a model path, which is arranged in parallel with a section of the transmit path, which exhibits a model filter to which the non-oversampled data symbol to be transmitted can be supplied, the non-oversampled data symbol exhibiting a non-flat PSD power spectrum, which exhibits an analysis and evaluation circuit which is arranged following the model filter and which checks whether the time domain function of the data symbol to be transmitted exhibits within a predetermined time interval at least one maximum, the amount of which exceeds a first threshold and/or determines the associated position of the maximum within the time interval, and which, by scaling and displacing a dirac-like sample function generates a correction function in dependence on the position and the amplitude of the maximum; (C) with a subtracting device which is connected to outputs of the mo

Abstract: Clock signal jitter detection circuit for detecting a clock signal jitter in a reference clock signal (CLK), having a switched-capacitor reference digital-analogue converter (15) which is clocked by the reference clock signal (CLK) and which converts a digital input signal into a first current, a current-controlled digital-analogue converter (16) which is clocked by the reference clock signal (CLK) and which converts the digital input signal into a second current, and having a current integrator (18) which integrates the difference between the first current and the second current to produce a signal which indicates the clock signal jitter in the reference clock signal (CLK).

Abstract: An analog-to-digital converter system converts an analog input signal into a digital output signal. The analog input signal is converted into a first digital signal by a fed back analog-to-digital conversion. A second digital signal is additionally formed, depending on the analog input signal or on the digital output signal, which, combined with the first digital signal, results in the digital output signal.

Abstract: Method for transmitting charging signals via a data transmission path using resonance phenomena The invention provides a method for transmitting charging signals, in which an electrical resonance effect is provided, with an output current (100) being emitted from a line current driver device (202), which output current (100) is passed through a data path filter block (201), which has a data transmission path unit (122) and a matching filter unit (123), to a line impedance (102), and the matching filter unit (123) and the data transmission path unit (122) are set such that an electrical resonance effect occurs, which leads to a voltage peak occurring in a line voltage level (101).

Abstract: A circuit arrangement for two-wire/four-wire conversion in a DMT system, which is connected to a digital reception path, a digital transmission path and also an analog transmission/reception path and which has nonlinear echo cancellation in the time domain of a signal and also linear echo cancellation in the frequency domain of the signal, furthermore comprises a device for adaptation of the nonlinearities in the frequency domain.

Abstract: The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (?), with the RC time constant (?) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy between the

Abstract: The method is used for limiting the power of a transmission-end signal (xn) compiled from a plurality of differently spread-coded signals. In this context, it is assumed that the quantity of spread codes used for the differently spread-coded signals is known as code engagement information (Cch,SF,k; 80). First, correction spread codes are selected by virtue of the engagement information (Cch,SF,k; 80) being evaluated. On the basis of the selected correction codes, a spread-coded correction signal (y?n) is formed which is overlaid with the compiled signal (xn).

Abstract: An apparatus for transmitting charging signals on a data transmission path having a line impedance includes a driver device for setting a line voltage level that corresponds to the line impedance. The driver device is configured to provide, in response to a driver input voltage level, a driver output current and a driver output voltage level. A current detection unit provides a current signal indicative of the driver output current and a current signal matching unit receives the current signal from the current detection unit and adjusts a level of the current signal for further processing by a filter device and by a regulation device. A matching filter unit then matches the driver device to a data transmission path unit.

Abstract: A method and a device for interpolating or decimating a signal is provided, the signal being processed by a plurality of signal processing means connected in series, which at least comprise means for increasing or reducing a clock rate of the signal and filtering means. To achieve adaptation to different operating modes or transmission standards, individual portions of the signal processing means connected in series can be bridged by bypasses. In addition, filtering parameters of the filtering means can be varied and factors, by which a clock rate of the signal is increased or reduced, can be changed.

Abstract: The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (&tgr;), with the RC time constant (&tgr;) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy bet

Abstract: The invention relates to a method for the compensation of interference in a signal generated by discrete multitone modulation. The signal generated by discrete multitone modulation has a multiplicity of carrier frequencies, and each carrier frequency has a signal vector. An error signal vector is generated from a reference signal vector, which is a signal vector from the multiplicity of signal vectors. The error signal vector is added to each of the remaining signal vectors of the multiplicity of signal vectors for the purpose of compensating for interference. Each of the signal vectors of the multiplicity of signal vectors, except for the reference signal vector, is assigned a set of adjustable coefficients by which the error signal vector is multiplied prior to the addition.

Abstract: The invention provides a method for transmitting an analog data stream (101) from a data stream transmitter (214) to a data stream receiver (215) by means of discrete multitone symbols (208), in which data (123) to be transmitted are input into a data input device (201) of the data stream transmitter (214), the data to be transmitted are coded in a coding device (202) and are combined into coded data blocks (125), the coded data blocks (125) are transformed into a multitone signal (303) in an inverse transformation device (203), the at least one multitone symbol (208) is converted into an analog transmitter signal (211) in a digital-to-analog converter (204), and the analog transmitter signal (211) is transmitted via a transmission channel (102).

Abstract: The invention relates to a circuit configuration for quantization of digital signals and for filtering quantization noise. Said circuit configuration comprises a multitude of digital control loops connected in series and having quantizers. The digital signals having a word length of m-bits are fed to a first control loop in the series. The quantization error signal of each quantizer is filtered and fed back to the corresponding digital control loop. It is then fed to a downstream digital control loop. The quantized output signal of the first digital control loop is adapted to a third word length of u-bits which is smaller than the first word length. Except for the quantized output signal of the first digital control loop, the quantized output signals of the digital control loops of the series are respectively filtered by a digital filter.

Abstract: An apparatus for transmitting charging signals on a data transmission path having a line impedance includes a driver device for setting a line voltage level that corresponds to the line impedance. The driver device is configured to provide, in response to a driver input voltage level, a driver output current and a driver output voltage level. A current detection unit provides a current signal indicative of the driver output current and a current signal matching unit receives the current signal from the current detection unit and adjusts a level of the current signal for further processing by a filter device and by a regulation device. A matching filter unit then matches the driver device to a data transmission path unit.

Abstract: Method for transmitting charging signals via a data transmission path using resonance phenomena The invention provides a method for transmitting charging signals, in which an electrical resonance effect is provided, with an output current (100) being emitted from a line current driver device (202), which output current (100) is passed through a data path filter block (201), which has a data transmission path unit (122) and a matching filter unit (123), to a line impedance (102), and the matching filter unit (123) and the data transmission path unit (122) are set such that an electrical resonance effect occurs, which leads to a voltage peak occurring in a line voltage level (101).