Abstract: An apparatus and method for dynamically adjusting the power/performance characteristics of a memory subsystem. Since the memory subsystem access requirements are heavily dependent on the application being executed, static methods of enabling or disabling the individual memory system components (as are used in prior art) are less than optimal from a power consumption perspective. By dynamically tracking the behavior of the memory subsystem, the invention predicts the probability that the next event will have certain characteristics, such as whether it will result in a memory cycle that requires the attention of a cache memory, whether that memory cycle will result in a cache memory hit, and whether a DRAM page hit in main memory will occur if the requested data is not in one of the levels of cache memory. Based on these probabilities, the invention dynamically enables or disables components of the subsystem.

Abstract: A method of dynamically adjusting the power consumption of a circuit block within an integrated circuit includes the step of incrementing a count total maintained by a counter on the occurrence of a first type of trigger event. The occurrence of a predetermined event is detected when the count total maintained by the counter equals, or transcends, a predetermined threshold value. The predetermined event provides a speculative indication of a future state of activity of the circuit block by reason of a predicted proximity of the predetermined event to the future state of activity of the circuit block. The power consumption of the circuit block is adjusted in response to the occurrence of the predetermined event.