Patents by Inventor Dilip Dixit

Dilip Dixit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230088925
    Abstract: A computer implemented method includes receiving an image that includes a type of object, segmenting the object into multiple segments via a trained segmentation machine learning model, and inputting the segments into multiple different attribute extraction models to extract different types of attributes from each of the multiple segments.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Inventors: Pramod Kumar Sharma, Yijian Xiang, Yiran Li, Paul Pangilinan Del Villar, Liang Du, Robin Abraham, Nilgoon Zarei, Mandar Dilip Dixit
  • Patent number: 11361225
    Abstract: A neural network architecture for attention-based efficient model adaptation is disclosed. A method includes accessing an input vector, the input vector comprising a numeric representation of an input to a neural network. The method includes providing the input vector to the neural network comprising a plurality of ordered layers, wherein each layer in at least a subset of the plurality of ordered layers is coupled with an adaptation module, wherein the adaptation module receives a same input value as a coupled layer for the adaptation module, and wherein an output value of the adaptation module is pointwise multiplied with an output value of the coupled layer to generate a next layer input value. The method includes generating an output of the neural network based on an output of a last one of the plurality of ordered layers in the neural network.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: June 14, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mandar Dilip Dixit, Gang Hua
  • Patent number: 11030772
    Abstract: Examples are disclosed that relate to computing devices and methods for synthesizing a novel pose of an object. One example provides a method comprising receiving a reference image of an object corresponding to an original viewpoint. The reference image of the object is translated into a depth map of the object, and a new depth map of the object is synthesized to correspond to a new viewpoint. A new image of the object is generated from the new viewpoint based on the new depth map of the object and the reference image of the object.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: June 8, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mandar Dilip Dixit, Bo Liu, Gang Hua
  • Publication number: 20200380720
    Abstract: Examples are disclosed that relate to computing devices and methods for synthesizing a novel pose of an object. One example provides a method comprising receiving a reference image of an object corresponding to an original viewpoint. The reference image of the object is translated into a depth map of the object, and a new depth map of the object is synthesized to correspond to a new viewpoint. A new image of the object is generated from the new viewpoint based on the new depth map of the object and the reference image of the object.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 3, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mandar Dilip DIXIT, Bo LIU, Gang HUA
  • Publication number: 20200193296
    Abstract: A neural network architecture for attention-based efficient model adaptation is disclosed. A method includes accessing an input vector, the input vector comprising a numeric representation of an input to a neural network. The method includes providing the input vector to the neural network comprising a plurality of ordered layers, wherein each layer in at least a subset of the plurality of ordered layers is coupled with an adaptation module, wherein the adaptation module receives a same input value as a coupled layer for the adaptation module, and wherein an output value of the adaptation module is pointwise multiplied with an output value of the coupled layer to generate a next layer input value. The method includes generating an output of the neural network based on an output of a last one of the plurality of ordered layers in the neural network.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 18, 2020
    Inventors: Mandar Dilip Dixit, Gang Hua
  • Patent number: 10223253
    Abstract: A memory allocation system is provided and includes nodes, one or more memories, and an allocation interface. Each of the nodes includes a respective set of processors. The one or more memories include memory elements for storing threads. The memory elements refer to respective portions of the one or more memories and are accessible to at least one of the nodes. The allocation interface is configured to allocate the memory elements to lockless list structures. Each of the lockless list structures is allocated to a respective set of the memory elements. The lockless list structures are partitioned for the processors. The allocation interface is configured to receive requests from the processors for the memory elements and adjust allocation of the memory elements between the lockless list structures according to a balancing metric.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: March 5, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Publication number: 20170249243
    Abstract: A memory allocation system is provided and includes nodes, one or more memories, and an allocation interface. Each of the nodes includes a respective set of processors. The one or more memories include memory elements for storing threads. The memory elements refer to respective portions of the one or more memories and are accessible to at least one of the nodes. The allocation interface is configured to allocate the memory elements to lockless list structures. Each of the lockless list structures is allocated to a respective set of the memory elements. The lockless list structures are partitioned for the processors. The allocation interface is configured to receive requests from the processors for the memory elements and adjust allocation of the memory elements between the lockless list structures according to a balancing metric.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Patent number: 9652289
    Abstract: Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: May 16, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Publication number: 20130290667
    Abstract: Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources.
    Type: Application
    Filed: April 27, 2012
    Publication date: October 31, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Publication number: 20070037975
    Abstract: Disclosed are compounds of the formula wherein R1 is hydrogen or an acyl group having 1 to 16 carbon atoms; R2 is a purine or pyrimidine base or an analogue or derivative thereof; Z is O, S, S?O or SO2; and pharmaceutically acceptable derivatives thereof. Also described are processes for and intermediates of use in their preparation, pharmaceutical compositions containing these compounds, and the use of these compounds in the antiviral treatment of mammals.
    Type: Application
    Filed: October 16, 2006
    Publication date: February 15, 2007
    Inventors: Bernard Belleau, Dilip Dixit, Nghe Nguyen-Ba, Pierette Belleau
  • Publication number: 20070037977
    Abstract: Disclosed are compounds of the formula wherein R1 is hydrogen or an acyl group having 1 to 16 carbon atoms; R2 is a purine or pyrimidine base or an analogue or derivative thereof; Z is O, S, S?O or SO2; and pharmaceutically acceptable derivatives thereof. Also, described are process for and intermediates of use in their preparation, pharmaceutical compositions containing these compounds, and the use of these compounds in the antiviral treatment of mammals.
    Type: Application
    Filed: August 11, 2006
    Publication date: February 15, 2007
    Inventors: Bernard Belleau, Pierette Belleau, Dilip Dixit, Nghe Nguyen-Ba
  • Patent number: 6844368
    Abstract: The present invention relates to novel oxo-aminotetralin compounds of the formula (I) wherein X, R1, R2, R3, R4, R5, and R6 are defined herein. The compounds of formula (I) are useful in pain management.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: January 18, 2005
    Inventors: Edward Roberts, Tiechao Li, Dilip Dixit, Krzysztof Bednarski, Jean-Francois Lavallée, Dick Storer, Wuyi Wang
  • Publication number: 20030087918
    Abstract: Disclosed are compounds of the formula
    Type: Application
    Filed: February 12, 2002
    Publication date: May 8, 2003
    Applicant: BioChem Pharma Inc.
    Inventors: Bernard Belleau, Pierette Belleau, Dilip Dixit, Nghe Nguyen-Ba
  • Patent number: 6498196
    Abstract: The present invention relates to novel thio-aminotetralin compounds of the formula (I) wherein Z, X, R1, R2, R3, R4, R5, and R6 are defined herein. The compounds are useful in pain management.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: December 24, 2002
    Inventors: Edward Roberts, Tiechao Li, Dilip Dixit, Krzysztof Bednarski, Dick Storer, Wuyi Wang
  • Patent number: 5270315
    Abstract: There is provided novel 2-substituted-4-substituted-1,3-dioxolanes which are particularly useful as antiviral agents.
    Type: Grant
    Filed: March 7, 1991
    Date of Patent: December 14, 1993
    Assignee: BioChem Pharma Inc.
    Inventors: Bernard Belleau, Dilip Dixit, Nghe Nguyen-Ba
  • Patent number: 5041449
    Abstract: There are provided novel 2-substituted-4-substituted-1,3-dioxolanes which are particularly useful as antiviral agents.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: August 20, 1991
    Assignee: IAF BioChem International, Inc.
    Inventors: Bernard Belleau, Dilip Dixit, Nghe Nguyen-Ba