Abstract: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.

Abstract: A system and method are provided for transporting a serial stream via a lower speed network using multiple parallel paths. At a transmitter, an optical or electromagnetic waveform is accepted representing a serial stream of digital information, and unbundled into n virtual information streams. Each virtual information stream is divided into a sequence of segments. Each segment is encapsulated, creating a sequence of packets by adding a start indicator to the beginning of each segment, and a terminate indicator to the end of each segment. Each packet is disinterleaved across m lanes and reinterleaved into n branches of framed data. Optical or electromagnetic waveforms representing the framed data are transmitted via n network branches. A receiver is also provided, which essentially reverses the above-described transmission method.

Abstract: A system and method are provided for deinterleaving differential inverse multiplexed (DIM) virtual channels in a 40G Ethernet receiver. The method accepts a 10.3125 gigabits per second (Gbps) (10G) Ethernet virtual channel with 64B/86B blocks, including periodic Lane Alignment Marker (LAM) blocks. The 10G virtual channel is deinterleaved into two 5.15625 Gbps (5G) virtual channels by: 1) deinterleaving consecutive blocks from the 10G virtual channel into the 5G virtual channels in an alternating order, and 2) reversing the order of deinterleaving in response to each detected LAM block. Then, the method supplies the 5G virtual channels (i.e. to a MAC module).

Abstract: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.

Abstract: A system and method are provided for deinterleaving differential inverse multiplexed (DIM) virtual channels in a 40G Ethernet receiver. The method accepts a 10.3125 gigabits per second (Gbps) (10G) Ethernet virtual channel with 64B/86B blocks, including periodic Lane Alignment Marker (LAM) blocks. The 10G virtual channel is deinterleaved into two 5.15625 Gbps (5G) virtual channels by: 1) deinterleaving consecutive blocks from the 10G virtual channel into the 5G virtual channels in an alternating order, and 2) reversing the order of deinterleaving in response to each detected LAM block. Then, the method supplies the 5G virtual channels (i.e. to a MAC module).

Abstract: A system and method are provided for transporting Plesiochronous Digital Hierarchy (PDH) tributaries. The method accepts a plurality of PDH tributaries; generates a serial data stream of interleaved PDH tributaries; generates a serial control stream of signals for recovering the PDH tributaries; and, generates a clock signal for timing the data and control streams. The serial data stream of interleaved PDH tributaries is loaded into the payload of a data frame structure. Likewise, the serial control stream is loaded into the payload of a control frame structure. The data bytes of the serial data stream and the control bytes of the serial control stream are both transmitted at the same data rate. That is, there is a control byte generated for each data byte. Thus, the control bytes in the control frame structure are aligned with corresponding data bytes in the data frame structure.

Abstract: A system and method are provided for transporting Plesiochronous Digital Hierarchy (PDH) tributaries. The method accepts a plurality of PDH tributaries; generates a serial data stream of interleaved PDH tributaries; generates a serial control stream of signals for recovering the PDH tributaries; and, generates a clock signal for timing the data and control streams. The serial data stream of interleaved PDH tributaries is loaded into the payload of a data frame structure. Likewise, the serial control stream is loaded into the payload of a control frame structure. The data bytes of the serial data stream and the control bytes of the serial control stream are both transmitted at the same data rate. That is, there is a control byte generated for each data byte. Thus, the control bytes in the control frame structure are aligned with corresponding data bytes in the data frame structure.

Abstract: A system and method are presented for providing packet and time division multiplex (TDM) services in a data communication interface. The method accepts packets at a first rate over a packet interface, and transfers time-sensitive data in the packets as packet data units (PDUs) having a smaller number of bits than a packet and a second rate, faster than the first rate. The method transforms the PDUs into frames in a first TDM protocol. Typically, the PDUs are transformed into units having a smaller number of bits than the PDU and a third rate, faster than the second rate. Then, the TDM frames are transmitted over a line interface.

Abstract: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.

Abstract: A system and method are provided for transporting Plesiochronous Digital Hierarchy (PDH) tributaries. The method accepts a plurality of PDH tributaries; generates a serial data stream of interleaved PDH tributaries; generates a serial control stream of signals for recovering the PDH tributaries; and, generates a clock signal for timing the data and control streams. The serial data stream of interleaved PDH tributaries is loaded into the payload of a data frame structure. Likewise, the serial control stream is loaded into the payload of a control frame structure. The data bytes of the serial data stream and the control bytes of the serial control stream are both transmitted at the same data rate. That is, there is a control byte generated for each data byte. Thus, the control bytes in the control frame structure are aligned with corresponding data bytes in the data frame structure.