Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: A communication device with a power detection scheme is disclosed. The communication device includes a transmitter for transmitting an RF signal, a demodulator for demodulating the RF signal by utilizing a phase-modulated (PM) signal provided from the transmitter to generate a demodulated signal, a loopback circuit coupled between the transmitter and the demodulator for transmitting the RF signal and the PM signal from the transmitter to the demodulator when the power detection scheme is enabled, and a power detector for detecting power of the demodulated signal.

Abstract: A transmit power control system includes: an output power estimator for estimating a transmit power of a transmitter; and a transmit power controller responsive to the output power estimator and to compare this with a requested power in order to calculate a target power which takes account of errors within the transmit power control system, and to vary a gain of an amplifier in a transmit signal path so as to reduce an error between the transmit power of the amplifier and the requested power.

Abstract: A transmit power control system includes: an output power estimator for estimating a transmit power of a transmitter; and a transmit power controller responsive to the output power estimator and to compare this with a requested power in order to calculate a target power which takes account of errors within the transmit power control system, and to vary a gain of an amplifier in a transmit signal path so as to reduce an error between the transmit power of the amplifier and the requested power.

Abstract: An integrated circuit is provided in which a scan controller for controlling a scan test is integrated within the integrated circuit and shares the same input pins as a serial programmable interface of the integrated circuit.

Abstract: An integrated circuit is provided in which a scan controller for controlling a scan test is integrated within the integrated circuit and shares the same input pins as a serial programmable interface of the integrated circuit.