Abstract: The bipolar transistor comprises a collector region (1) of a semiconductor material having a first doping type, a base region (2) of a semiconductor material having a second doping type, and an emitter region (3) having the first doping type. A junction is present between the emitter region (3) and the base region (2), and, viewed from the junction (4), a depletion region (5) extends into the emitter region (3). The emitter region (3) comprises a layer (6) of a first semiconductor material and a layer (7) of a second semiconductor material. The first semiconductor material has a higher intrinsic carrier concentration than the second semiconductor material. The layer (7) of said second semiconductor material is positioned outside the depletion region (5). The second semiconductor material has such a doping concentration that Auger recombination occurs. The invention also relates to a semiconductor device comprising such a bipolar transistor.

Abstract: The invention relates to a method of manufacturing implanted-base, double polysilicon bipolar transistors whose emitter, base and collector are all situated in a single active area. In accordance with the method, first the island isolation (3) defining the active area (4) in the silicon body (1) is provided, which active area forms the collector (5). A first polysilicon layer (6) is deposited on the surface. A first part (6a) of poly I is p-type doped, a second part is n-type doped. By etching, two separate parts are formed from the first poly layer, one part being p-type doped and forming a base terminal (8), the other part being n-type doped and forming a collector terminal (9), said two parts being separated by an intermediate region (16) where the surface of the active area is exposed. The edges of these poly terminals and the exposed parts of the active area are provided with spacers (13, 15) and spacers (14, 16), respectively.

Abstract: The bipolar transistor comprises a collector region (1) of a semiconductor material having a first doping type, a base region (2) of a semiconductor material having a second doping type, and an emitter region (3) having the first doping type. A junction is present between the emitter region (3) and the base region (2), and, viewed from the junction (4), a depletion region (5) extends into the emitter region (3). The emitter region (3) comprises a layer (6) of a first semiconductor material and a layer (7) of a second semiconductor material. The first semiconductor material has a higher intrinsic carrier concentration than the second semiconductor material. The layer (7) of said second semiconductor material is positioned outside the depletion region (5). The second semiconductor material has such a doping concentration that Auger recombination occurs. The invention also relates to a semiconductor device comprising such a bipolar transistor.

Abstract: The bipolar transistor comprises a collector region (1) of a semiconductor material having a first doping type, a base region (2) of a semiconductor material having a second doping type, and an emitter region (3) having the first doping type. A junction is present between the emitter region (3) and the base region (2), and, viewed from the junction (4), a depletion region (5) extends into the emitter region (3). The emitter region (3) comprises a layer (6) of a first semiconductor material and a layer (7) of a second semiconductor material.

Abstract: The bipolar transistor comprises a collector region (1) of a semiconductor material having a first doping type, a base region (2) of a semiconductor material having a second doping type, and an emitter region (3) having the first doping type. A junction is present between the emitter region (3) and the base region (2), and, viewed from the junction (4), a depletion region (5) extends into the emitter region (3). The emitter region (3) comprises a layer (6) of a first semiconductor material and a layer (7) of a second semiconductor material.

Abstract: The invention relates to a method of manufacturing implanted-base, double polysilicon bipolar transistors whose emitter, base and collector are all situated in a single active area. In accordance with the method, first the island isolation (3) defining the active area (4) in the silicon body (1) is provided, which active area forms the collector (5). A first polysilicon layer (6) is deposited on the surface. A first part (6a) of poly I is p-type doped, a second part is n-type doped. By etching, two separate parts are formed from the first poly layer, one part being p-type doped and forming a base terminal (8), the other part being n-type doped and forming a collector terminal (9), said two parts being separated by an intermediate region (16) where the surface of the active area is exposed. The edges of these poly terminals and the exposed parts of the active area are provided with spacers (13, 15) and spacers (14, 16), respectively.

Abstract: A method of manufacturing a semiconductor device comprising heterojunction bipolar transistors (HBTs), in which method a first semiconductor layer of monocrystalline silicon (5), a second semiconductor layer of monocrystalline silicon comprising 5 to 25 at. % germanium (6) and a third semiconductor layer of monocrystalline silicon (7) are successively provided on a surface (2) of a silicon wafer (1) by means of epitaxial deposition. Base zones of the transistors are formed in the second semiconductor layer. In this method, the second semiconductor layer is deposited without a base doping, said doping being formed at a later stage. Said doping can be formed by means of an ion implantation process or a VPD (Vapor Phase Doping) process. This method enables integrated circuits comprising npn-transistors as well as pnp-transistors to be manufactured.

Abstract: A method of manufacturing a semiconductor device with an epitaxial semiconductor zone, whereby a first layer of insulating material, a first layer of non-monocrystalline silicon, and a second layer of insulating material are provided in that order on a surface of a silicon wafer, a window with a steep wall is etched through the second layer of insulating material and the first layer of non-monocrystalline silicon, the wall of the window is provided with a protective layer, the first insulating layer is selectively etched away within the window and below an edge of the first layer of non-monocrystalline silicon adjoining the window such that both the edge of the first layer of non-monocrystalline silicon itself and the surface of the wafer become exposed within the window and below said edge, semiconductor material is selectively deposited such that the epitaxial semiconductor zone is formed on the exposed surface of the wafer, and an edge of polycrystalline semiconductor material connected to the epitaxi

Abstract: The invention relates to the manufacture of a so-called differential bipolar transistor comprising a base (1A), an emitter (2) and a collector (3), the base (1A) being formed by applying a doped semiconducting layer (1) which locally borders on a monocrystalline part (3) of the semiconductor body (10) where it forms the (monocrystalline) base (1A), and which semiconducting layer (1) borders, outside said monocrystalline part, on a non-monocrystalline part (4, 8) of the semiconductor body (10) where it forms a (non-monocrystalline) connecting region (1B) of the base (1A). The non-monocrystalline part (4, 8) of the semiconductor body (10) is obtained by covering the semiconductor body (10) with a mask (20) and replacing on either side thereof a part (8) of the semiconductor body (10) by an electrically insulating region (8) and by providing this, prior to the application of the semiconducting layer (1) with a polycrystalline semiconducting layer (4).

Abstract: The invention relates to a method of manufacturing a discrete or integrated bipolar transistor comprising a base (1A), an emitter (2) and a collector (3). The base (1A) and a connecting region (1B) of the base (1A) are formed by providing a semiconductor body (10) with a doped semiconducting layer (1) which locally borders on a monocrystalline part (3) of the semiconductor body which forms the collector (3). Outside said base, the layer (1) borders on a non-monocrystalline part (4) of the semiconductor body (10) and forms a non-monocrystalline connecting region (1B) of the base (1A). By means of a mask (5), the doping concentration of the layer (1) outside the mask (5) is selectively increased, resulting in a highly conducting connection region (1B) and a very fast transistor. In the known method, an ion implantation is used for this purpose.