Abstract: Systems and methods for DC offset correction in analog and digital direct conversion RF receivers. A time derivate and subsequent integration of in-phase and quadrature phase signal path components is performed to effectively remove DC offset from the resultant down converted baseband signal.

Abstract: The flotation cushion with deployable tether is generally the contour shape of a cushion without tether. A pocket is formed in the flotation cushion to conform to existing cushion structures. The tether is stored in the pocket in a manner to minimize bulging. With the tether attached at one end to the flotation cushion interior to the pocket, the flotation cushion may be thrown to a person in need of rescue while the user is grasping the tether at its free end. When the person to be rescued grabs the flotation cushion the tether may be used to retrieve the person and cushion.

Abstract: The flotation cushion with deployable tether is generally the contour shape of a cushion without tether. A pocket is formed in the flotation cushion to conform to existing cushion structures. The tether is stored in the pocket in a manner to minimize bulging. With the tether attached at one end to the flotation cushion interior to the pocket, the flotation cushion may be thrown to a person in need of rescue while the user is grasping the tether at its free end. When the person to be rescued grabs the flotation cushion the tether may be used to retrieve the person and cushion.

Abstract: A method and apparatus for processing a wafer are described. In one embodiment, a method for processing a wafer comprises applying a sealing mechanism to the wafer to create multiple separate, sealed portions of the wafer, and applying a plurality of different chemistries to multiple separate, sealed portions of the wafer through the sealing mechanism.

Abstract: The reusable coupling assembly of the present invention includes a receiving and an inserted section. The tubing engagement end of both the inserted and the receiving sections is constructed and arranged to securely fit around the resin liner in externally threaded fiberglass resin lined metal pipe or tubing with cement mortar backing. When the sections of externally threaded fiberglass resin lined pipe or tubing sections with cement mortar backing are put together utilizing and internally threaded coupling, the receiving and the inserted mating sections come together within a mastic material to prevent corrosive fluids flowing through the externally threaded metal tubing or pipe sections from damaging any exposed metal surfaces within the internally threaded coupling.

Abstract: A virtual address translator comprises a content addressed memory and a word addressed memory. A task name and subsegment number from a virtual address supplied by a processor are employed as a key word to search a content addressed memory and read out a subsegment descriptor if the key word is matched. The subsegment descriptor includes an absolute base address which is added to a deflection field to obtain an absolute memory address. The memory address is applied to a memory to permit transfer of a word between the processor and the memory. The processor may present any one of several task names depending upon whether the memory reference is made for an instruction or data for the processor, or for an instruction or data for an I/O connected to the processor. Bounds, residency and access privileges are checked using the subsegment descriptor.

Abstract: A virtual address translator comprises a content addressed memory and a word addressed memory. A task name and subsegment number from a virtual address supplied by a processor are employed as a key word to search a content addressed memory and read out a subsegment descriptor if the key word is matched. The subsegment descriptor includes an absolute base address which is added to a deflection field to obtain an absolute memory address. The memory address is applied to a memory to permit transfer of a word between the processor and the memory. The processor may present any one of several task names depending upon whether the memory reference is made for an instruction or data for the processor, or for an instruction or data for an I/O connected to the processor. Bounds, residency and access privileges are checked using the subsegment descriptor.