Abstract: A customizable communications bus control gate array for facilitating communications between devices on two disparate digital communications channels. The gate array has a mask programmable integrated circuit with two I/O interface devices which are respectively connected to two different communications channels. The gate array also has a translating device connected to each of the I/O interface devices for translating electrical signals therebetween. Logic control is also provided and connected to both of the I/O interface device and to the translating device for controlling operations thereof so that predetermined communications requirements between both of the disparate communications channels are satisfied.

Abstract: A master-slave D-type flip-flop includes a master section (14) and a slave section (16). The master section (14) has a master clock differential transistor pair formed of a first input transistor (MQ14) and a first reference transistor (MQ13) whose emitters are connected together. The slave section (16) has a slave clock differential transistor pair formed of a second input transistor (SQ9) and a second reference transistor (SQ10) whose emitters are connected together. An improved voltage offset means is provided for creating a separation of thresholds between the master section and the slave section. The offset voltage means is formed of the first input transistor (MQ14) of the master section having dual-emitters and of the second reference transistor (SQ10) of the slave section having dual-emitters.

Abstract: Output buffer circuits formed of merged bipolar transistor and CMOS transistors to produce either two output states or three output states includes a plurality of CMOS transistors and a pair of bipolar transistors. The output buffer circuits have high current drive capabilities and low propagation delay.

Abstract: Logic circuits formed of merged P-channel MOS transistors and bipolar transistors to produce a single logic gate include a plurality of P-channel MOS transistors and a pair of bipolar transistors. The logic gate circuits have low power dissipation and a large noise margin.