Patents by Inventor Donald R. DeSota
Donald R. DeSota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947462Abstract: Techniques are disclosed relating to cache footprint management. In some embodiments, execution circuitry is configured to perform operations for instructions from multiple threads in parallel. Cache circuitry may store information operated on by threads executed by the execution circuitry. Scheduling circuitry may arbitrate among threads to schedule threads for execution by the execution circuitry. Tracking circuitry may determine one or more performance metrics for the cache circuitry. Control circuitry may, based on the one or more performance metrics meeting a threshold, reduce a limit on a number of threads considered for arbitration by the scheduling circuitry, to control a footprint of information stored by the cache circuitry. Disclosed techniques may advantageously reduce or avoid cache thrashing for certain processor workloads.Type: GrantFiled: March 3, 2022Date of Patent: April 2, 2024Assignee: Apple Inc.Inventors: Yoong Chert Foo, Terence M. Potter, Donald R. DeSota, Benjiman L. Goodman, Aroun Demeure, Cheng Li, Winnie W. Yeung
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Patent number: 9317427Abstract: According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus utilization threshold for each of a plurality of processors of a data processing system to maintain memory databus utilization of the data processing system at or below a system threshold. The method also includes monitoring memory databus utilization for the plurality of processors and, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocating at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.Type: GrantFiled: October 14, 2014Date of Patent: April 19, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Donald R. DeSota, Rajendra D. Panda, Venkat R. Indukuru, Joseph H. Robichaux, Robert H. Bell, Jr., Steven P. Hartman
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Patent number: 9098351Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: GrantFiled: November 19, 2013Date of Patent: August 4, 2015Assignee: International Business Machines CorporationInventors: Robert H. Bell, Jr., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Publication number: 20150032977Abstract: According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus utilization threshold for each of a plurality of processors of a data processing system to maintain memory databus utilization of the data processing system at or below a system threshold. The method also includes monitoring memory databus utilization for the plurality of processors and, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocating at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.Type: ApplicationFiled: October 14, 2014Publication date: January 29, 2015Inventors: Donald R. DeSota, Rajendra D. Panda, Venkat R. Indukuru, Joseph H. Robichaux, Robert H. Bell, JR., Steven P. Hartman
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Patent number: 8898674Abstract: According to one aspect of the present disclosure a system and computer program product for managing memory access is disclosed. The system includes a plurality of memory controllers each configured to maintain memory databus utilization by a corresponding processor at or below a threshold to maintain memory databus utilization of the system at or below a system threshold. The system also includes a service processor configured to receive memory databus utilization data from the memory controllers and programmed to, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocate at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.Type: GrantFiled: December 23, 2009Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: Donald R. Desota, Rajendra D. Panda, Venkat R. Indukuru, Joseph H. Robichaux, Robert H. Bell, Jr., Steven P. Hartman
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Publication number: 20140075448Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: ApplicationFiled: November 19, 2013Publication date: March 13, 2014Applicant: International Business Machines CorporationInventors: Robert H. Bell, Jr., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Patent number: 8612984Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: GrantFiled: November 1, 2010Date of Patent: December 17, 2013Assignee: International Business Machines CorporationInventors: Robert H. Bell, Jr., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Patent number: 8589656Abstract: Queuing of received transactions that have a resource conflict is disclosed. A first node receives a first transaction from a second node, where the first transaction relates to a resource of the first node. The transaction may be a request relating to a memory line of the first node, for instance. It is determined that a second transaction that relates to this resource of the first node is already being processed by the first node. Therefore, the first transaction is enqueued in a conflict queue within the first node. The queuing may be a linked list, a priority queue, or another type of queue. Once the second transaction has been processed, the first transaction is restarted for processing by the first node. The first transaction is then processed by the first node.Type: GrantFiled: June 25, 2011Date of Patent: November 19, 2013Assignee: International Business Machines CorporationInventors: Donald R. DeSota, Robert Joersz, Davis A. Miller, Maged M. Michael
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Patent number: 8578130Abstract: Partitioning a node of a multi-node system into more than one partition is disclosed. First resources of the node are physically partitioned into more than one partition. The first resources physically partitioned to each partition are directly inaccessible by other partitions of the node. Second resources of the node are then internally logically partitioned into the more than one partition. Each second resource internally separates transactions of one partition from transactions of other partitions. Furthermore, the node can be dynamically repartitioned into other partitions, such as a single partition, without having to take the multi-node system down. Operating system (OS) instances of the partitions may have assumptions provided to allow for dynamic partitioning, such as quiescing the processors and/or the input/output components being reconfigured, purging remote cache entries across the entire OS, etc.Type: GrantFiled: March 10, 2003Date of Patent: November 5, 2013Assignee: International Business Machines CorporationInventors: Donald R. DeSota, Bruce M. Gilbert, Robert Joersz, Wayne A. Downer
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Patent number: 8527997Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: GrantFiled: April 27, 2012Date of Patent: September 3, 2013Assignee: International Business Machines CorporationInventors: Robert H. Bell, Jr., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Publication number: 20120216205Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: ApplicationFiled: April 27, 2012Publication date: August 23, 2012Applicant: International Business Machines CorporationInventors: Robert H. Bell, JR., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Patent number: 8250330Abstract: A memory controller includes ports and corresponding tables. Each port is receptive to one or more memory modules. Each table includes entries mapping memory addresses to the memory modules. Each entry corresponds to no more than one of the memory modules. The tables support asymmetric population of the memory modules within the ports; each port is capable of having a different number of memory modules relative to the other ports. The tables impose no restrictions on where the memory modules are to be inserted within the ports, both number-wise and position-wise. The tables are independently configurable; the configuration of each table is modifiable independently of the configurations of the other tables. Each table is dynamically configurable. The entries of a table are modifiable to reflect changes in the number and type of the memory modules connected, without restarting or temporarily halting the computer system containing the memory controller.Type: GrantFiled: December 11, 2004Date of Patent: August 21, 2012Assignee: International Business Machines CorporationInventors: Eric N. Lais, Donald R. DeSota, Michael Grassi, Bruce M. Gilbert
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Publication number: 20120191939Abstract: According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus utilization threshold for each of a plurality of processors of a data processing system to maintain memory databus utilization of the data processing system at or below a system threshold. The method also includes monitoring memory databus utilization for the plurality of processors and, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocating at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.Type: ApplicationFiled: March 29, 2012Publication date: July 26, 2012Applicant: International Business Machines CorporationInventors: Donald R. DESOTA, Rajendra D. PANDA, Venkat R. INDUKURU, Joseph H. ROBICHAUX, Robert H. BELL, JR., Steven P. HARTMAN
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Patent number: 8229867Abstract: Selecting bits in a string-based genetic algorithm is provided. A type of genetic operation to perform is determined. Responsive to a determination to perform a crossover operation, an input comprising a pair of strings is received. The strings in the pair of strings are compared to identify a set of non-matching points. A set of points from the set of non-matching points is randomly selected, forming a set of randomly selected non-matching points. A new string for the pair of strings is generated using the set of randomly selected non-matching points.Type: GrantFiled: November 25, 2008Date of Patent: July 24, 2012Assignee: International Business Machines CorporationInventors: Jason F. Cantin, Donald R. DeSota
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Publication number: 20110271283Abstract: A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.Type: ApplicationFiled: November 1, 2010Publication date: November 3, 2011Applicant: International Business Machines CorporationInventors: Robert H. Bell, JR., Luigi Brochard, Donald R. DeSota, Rajendra D. Panda, Francois Thomas
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Publication number: 20110258401Abstract: Queuing of received transactions that have a resource conflict is disclosed. A first node receives a first transaction from a second node, where the first transaction relates to a resource of the first node. The transaction may be a request relating to a memory line of the first node, for instance. It is determined that a second transaction that relates to this resource of the first node is already being processed by the first node. Therefore, the first transaction is enqueued in a conflict queue within the first node. The queuing may be a linked list, a priority queue, or another type of queue. Once the second transaction has been processed, the first transaction is restarted for processing by the first node. The first transaction is then processed by the first node.Type: ApplicationFiled: June 25, 2011Publication date: October 20, 2011Inventors: Donald R. DeSota, Robert Joersz, Davis A. Miller, Maged M. Michael
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Patent number: 8015248Abstract: Queuing of received transactions that have a resource conflict is disclosed. A first node receives a first transaction from a second node, where the first transaction relates to a resource of the first node. The transaction may be a request relating to a memory line of the first node, for instance. It is determined that a second transaction that relates to this resource of the first node is already being processed by the first node. Therefore, the first transaction is enqueued in a conflict queue within the first node. The queuing may be a linked list, a priority queue, or another type of queue. Once the second transaction has been processed, the first transaction is restarted for processing by the first node. The first transaction is then processed by the first node.Type: GrantFiled: March 29, 2009Date of Patent: September 6, 2011Assignee: International Business Machines CorporationInventors: Donald R. DeSota, Robert Joersz, Davis A. Miller, Maged M. Michael
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Publication number: 20110154352Abstract: According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus utilization threshold for each of a plurality of processors of a data processing system to maintain memory databus utilization of the data processing system at or below a system threshold. The method also includes monitoring memory databus utilization for the plurality of processors and, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocating at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Applicant: International Business Machines CorporationInventors: Donald R. DESOTA, Rajendra D. Panda, Venkat R. Indukuru, Joseph H. Robichaux, Robert H. Bell, JR., Steven P. Hartman
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Patent number: 7861126Abstract: An implementation-efficient, multiple-counter value hardware performance counter is disclosed. A hardware counter of one embodiment includes a memory array and a hardware incrementer. The array stores counter values that are indexable by an index constructed based at least on the number of events to which the counter values correspond. The index may be constructed as a concatenation of a number of bits binarily representing the number of events, and a number of bits binarily representing the number of qualifiers to the events. The incrementer reads the counter values from the array, increments the counter values, and writes the resulting counter values back into the array. The array may be divided into banks over which the counter values are stored, where each bank has a separate instance of the incrementer. Each bank may have a separate instance of the index that indexes only those counters stored in the bank.Type: GrantFiled: June 29, 2008Date of Patent: December 28, 2010Assignee: International Business Machines CorporationInventors: Carl E. Love, Donald R. DeSota, Jaeheon Jeong, Russell M. Clapp
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Patent number: 7827449Abstract: Non-inline transaction error correction is disclosed. Where a transaction being processed in a pipeline is determined to include a correctable error, it is output, or drained, from the pipeline into an error queue. The pipeline is switched from a normal mode of operation to a correction mode of operation. In the correction mode, a correction command is inserted into and processed within the pipeline to correct the error within the transaction. The pipeline is switched from the correction mode of operation to a restart mode of operation. In the restart mode, the transaction is reprocessed within the pipeline. The pipeline is then switched from the restart mode of operation back to the normal mode of operation.Type: GrantFiled: January 27, 2008Date of Patent: November 2, 2010Assignee: International Business Machines CorporationInventors: Bruce M. Gilbert, Donald R. DeSota, Robert Joersz