Patents by Inventor Donald R. Disney

Donald R. Disney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150188521
    Abstract: An electronic circuit comprising a driver and a main transistor are provided. The driver may include a bias voltage generator, a supplementary transistor, and an output driver. The bias voltage generator may be configured to receive a voltage input and generate a biased voltage output based on the voltage input. The supplementary transistor may have a gate coupled to the biased voltage output of the bias voltage generator, and a source of the supplementary transistor providing a current to the bias voltage generator. The output driver may be configured to receive the biased voltage output from the bias voltage generator and the voltage input, receive the voltage input, and output a drive voltage. The main transistor of the electronic circuit may have a gate, a coupled to the drive voltage, and a drain coupled to a drain of the supplementary transistor.
    Type: Application
    Filed: December 22, 2014
    Publication date: July 2, 2015
    Inventors: Hemal N. Shah, Donald R. Disney, Heratch Amirkhani Namagerdi
  • Patent number: 9059329
    Abstract: The present invention discloses a power device with integrated power transistor and Schottky diode and a method for making the same. The power device comprises a power transistor having a drain region, a Schottky diode in the drain region of the power transistor, and a trench-barrier near the Schottky diode. The trench-barrier is provided to reduce a reverse leakage current of the Schottky diode and minimizes the possibility of introducing undesired parasitic bipolar junction transistor in the power device.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: June 16, 2015
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Donald R. Disney
  • Publication number: 20150137140
    Abstract: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
    Type: Application
    Filed: January 27, 2015
    Publication date: May 21, 2015
    Inventors: Donald R. Disney, Hui Nie, Isik C. Kizilyalli, Richard J. Brown
  • Publication number: 20150137134
    Abstract: An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the anode of the second GaN diode is electrically connected to the leadframe.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 21, 2015
    Applicant: AVOGY, INC.
    Inventors: Hemal N. Shah, Donald R. Disney
  • Publication number: 20150132900
    Abstract: An embodiment of a vertical power device includes a III-nitride substrate, a drift region coupled to the III-nitride substrate and comprising a III-nitride material of a first conductivity type, and a channel region coupled to the drift region and comprising a III-nitride material of the first conductivity type. The vertical power device also includes a source region coupled to the channel region and comprising a III-nitride material of the first conductivity type, and a gate region coupled to the channel region. The gate region includes a III-nitride material of a second conductivity type. The vertical power device further includes a source-coupled region coupled to the drift region and electrically connected with the source region. The source-coupled region includes a III-nitride material of the second conductivity type.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 14, 2015
    Inventor: Donald R. Disney
  • Patent number: 9029210
    Abstract: A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: May 12, 2015
    Assignee: AVOGY, INC.
    Inventors: Hui Nie, Andrew P. Edwards, Donald R. Disney, Isik C. Kizilyalli
  • Publication number: 20150102360
    Abstract: An embodiment of a semiconductor device includes a gallium nitride (GaN) substrate having a first surface and a second surface. The second surface is substantially opposite the first surface, at least one device layer is coupled to the first surface, and a backside metal is coupled to the second surface. A top metal stack is coupled to the at least one device layer. The top metal stack includes a contact metal coupled to a surface of the at least one device layer, a protection layer coupled to the contact metal, a diffusion barrier coupled to the protection layer, and a pad metal coupled to the diffusion barrier. The semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Inventors: Brian Joel Alvarez, Donald R. Disney, Hui Nie, Patrick James Lazlo Hyland
  • Publication number: 20150104912
    Abstract: A method for fabricating a vertical GaN power device includes providing a first GaN material having a first conductivity type and forming a second GaN material having a second conductivity type and coupled to the first GaN material to create a junction. The method further includes implanting ions through the second GaN material and into a first portion of the first GaN material to increase a doping concentration of the first conductivity type. The first portion of the junction is characterized by a reduced breakdown voltage relative to a breakdown voltage of a second portion of the junction.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 16, 2015
    Inventor: Donald R. Disney
  • Patent number: 8981432
    Abstract: A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the GaN-based functional layers and removing at least a portion of the engineered substrate structure. The method further includes forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers and removing the carrier substrate.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Avogy, Inc.
    Inventors: Hui Nie, Donald R. Disney, Isik C. Kizilyalli
  • Patent number: 8969180
    Abstract: A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: March 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Hui Nie, Andrew P. Edwards, Donald R. Disney, Richard J. Brown, Isik C. Kizilyalli
  • Patent number: 8969926
    Abstract: An embodiment of a vertical power device includes a III-nitride substrate, a drift region coupled to the III-nitride substrate and comprising a III-nitride material of a first conductivity type, and a channel region coupled to the drift region and comprising a III-nitride material of the first conductivity type. The vertical power device also includes a source region coupled to the channel region and comprising a III-nitride material of the first conductivity type, and a gate region coupled to the channel region. The gate region includes a III-nitride material of a second conductivity type. The vertical power device further includes a source-coupled region coupled to the drift region and electrically connected with the source region. The source-coupled region includes a III-nitride material of the second conductivity type.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 3, 2015
    Assignee: Avogy, Inc.
    Inventor: Donald R. Disney
  • Patent number: 8947154
    Abstract: An electronic circuit comprising a driver and a main transistor are provided. The driver may include a bias voltage generator, a supplementary transistor, and an output driver. The bias voltage generator may be configured to receive a voltage input and generate a biased voltage output based on the voltage input. The supplementary transistor may have a gate coupled to the biased voltage output of the bias voltage generator, and a source of the supplementary transistor providing a current to the bias voltage generator. The output driver may be configured to receive the biased voltage output from the bias voltage generator and the voltage input, receive the voltage input, and output a drive voltage. The main transistor of the electronic circuit may have a gate, a coupled to the drive voltage, and a drain coupled to a drain of the supplementary transistor.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: February 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Hemal N. Shah, Donald R. Disney, Heratch Amirkhani Namagerdi
  • Patent number: 8946725
    Abstract: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Donald R. Disney, Hui Nie, Isik C. Kizilyalli, Richard J. Brown
  • Patent number: 8937317
    Abstract: An electronic package includes a leadframe, a plurality of pins, a gallium-nitride (GaN) transistor, and a GaN diode. The GaN transistor includes a drain region, a drift region, a source region, and a gate region; the drain region includes a GaN substrate and a drain contact, the drift region includes a first GaN epitaxial layer coupled to the GaN substrate, the source region includes a source contact and is separated from the GaN substrate by the drift region, and the gate region includes a second GaN epitaxial layer and a gate contact. The GaN diode includes an anode region and a cathode region, the cathode region including the GaN substrate and a cathode contact, and the anode region including a third GaN epitaxial layer coupled to the GaN substrate and an anode contact. The drain contact and the anode contact are electrically connected to the leadframe.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: January 20, 2015
    Assignee: Avogy, Inc.
    Inventors: Donald R. Disney, Hemal N. Shah
  • Patent number: 8916871
    Abstract: An embodiment of a semiconductor device includes a gallium nitride (GaN) substrate having a first surface and a second surface. The second surface is substantially opposite the first surface, at least one device layer is coupled to the first surface, and a backside metal is coupled to the second surface. A top metal stack is coupled to the at least one device layer. The top metal stack includes a contact metal coupled to a surface of the at least one device layer, a protection layer coupled to the contact metal, a diffusion barrier coupled to the protection layer, and a pad metal coupled to the diffusion barrier. The semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: December 23, 2014
    Assignee: Avogy, Inc.
    Inventors: Brian Joel Alvarez, Donald R. Disney, Hui Nie, Patrick James Lazlo Hyland
  • Publication number: 20140346527
    Abstract: A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Richard J. Brown, Donald R. Disney
  • Publication number: 20140346522
    Abstract: An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the cathode of the second GaN diode is electrically connected to the leadframe.
    Type: Application
    Filed: May 23, 2013
    Publication date: November 27, 2014
    Applicant: AVOGY, INC.
    Inventors: Donald R. Disney, Hemal N. Shah
  • Patent number: 8866148
    Abstract: A method for fabricating a vertical GaN power device includes providing a first GaN material having a first conductivity type and forming a second GaN material having a second conductivity type and coupled to the first GaN material to create a junction. The method further includes implanting ions through the second GaN material and into a first portion of the first GaN material to increase a doping concentration of the first conductivity type. The first portion of the junction is characterized by a reduced breakdown voltage relative to a breakdown voltage of a second portion of the junction.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: October 21, 2014
    Assignee: Avogy, Inc.
    Inventor: Donald R. Disney
  • Publication number: 20140291691
    Abstract: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
    Type: Application
    Filed: February 27, 2014
    Publication date: October 2, 2014
    Applicant: Avogy, Inc.
    Inventors: Donald R. Disney, Hui Nie, Isik C. Kizilyalli, Richard J. Brown
  • Publication number: 20140295652
    Abstract: A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventors: Hui Nie, Andrew P. Edwards, Donald R. Disney, Isik C. Kizilyalli