Patents by Inventor Donald William Schmidt

Donald William Schmidt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030061379
    Abstract: A mechanism for allowing a single physical IB node to virtualize a plurality of host channel adapters is provided. This includes providing the appearance of both a router and multiple virtual HCA's residing behind that router, to the external REAL subnet components. Each virtual host channel adapter will have unique access control levels. One or more InfiniBand subnets are virtualized in such a way that nodes residing both within the virtual subnets and in separate physical subnets are completely unaware of the virtualization. This virtualization of InfiniBand subnets significantly increases the horizontal scaling capabilities of a single InfiniBand physical component, while at the same time provides “native” network throughput for all the virtual hosts.
    Type: Application
    Filed: September 27, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: David F. Craddock, David Arlen Elko, Thomas Anthony Gregg, Gregory Francis Pfister, Renato John Recio, Donald William Schmidt
  • Publication number: 20030061417
    Abstract: A distributed computing system having (host and I/O) end nodes, switches, routers, and links interconnecting these components is provided. The end nodes use send and receive queue pairs to transmit and receive messages. The end nodes use completion queues to inform the end user when a message has been completely sent or received and whether an error occurred during the message transmission or reception process. A mechanism implements these queue pairs and completion queues in hardware. A mechanism for controlling the transfer of work requests from the consumer to the CA hardware and work completions from the CA hardware to the consumer using head and tail pointers that reference circular buffers is also provided. The QPs and CQs do not contain Work Queue Entries and Completion Queue Entries respectively, but instead contain references to these entries.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: David F. Craddock, Thomas Anthony Gregg, Ian David Judd, Gregory Francis Pfister, Renato John Recio, Donald William Schmidt
  • Publication number: 20030058875
    Abstract: A distributed computing system is provided having (host and I/O) end nodes, switches, routers, and links interconnecting these components. The end nodes use send and receive queue pairs to transmit and receive messages. The end nodes use completion queues to inform the end user when a message has been completely sent or received and whether an error occurred during the message transmission or reception process. A mechanism may implement these queue pairs and completion queues in hardware. A mechanism controls the transfer of work requests from the consumer to the channel adapter hardware using only head pointers in the hardware is described, along with a mechanism for passing work completions from the channel adapter hardware to the consumer using only tail pointers in the hardware. With this scheme the channel adapter hardware can inform the CI that a work request has been completed and provide the work completion information with just a single write to system memory.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines corporation
    Inventors: Richard Louis Arndt, David F. Craddock, Thomas Anthony Gregg, Ian David Judd, Gregory Francis Pfister, Renato John Recio, Donald William Schmidt
  • Publication number: 20030046505
    Abstract: An apparatus and method for swapping out real memory by inhibiting input/output (I/O) operations to a memory region are provided. The apparatus and method provide a mechanism in which a quiesce indicator is provided in a field containing the current outstanding I/O count associated with the memory region whose real memory is to be swapped out. The current I/O field and the quiesce indicator are used as a means for communicating between a shared resource arbitrator and a guest consumer. When the quiesce indicator is set, the guest consumer is informed that it should not send any further I/O operations to that memory region. When the number of pending I/O operations against the memory region is zero, a valid bit in a protection table is set to invalid, and the real memory associated with the memory region may be swapped out.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 6, 2003
    Applicant: International Business Machines Corporation
    Inventors: Davie F. Craddock, Thomas Anthony Gregg, Renato John Recio, Donald William Schmidt
  • Publication number: 20030023786
    Abstract: An apparatus and method for managing work and completion queues using head and tail circular pointers. With the apparatus and method, queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter include a queue pointer table index and a queue page index for identifying a position within the queue. For work queues, the tail pointer in the channel interface is used to identify a next position where a work queue entry may be written. The head pointer in the channel interface is used only to determine whether the work queue is full or not. The head pointer in the host channel adapter is used to identify a next work queue entry for processing by the host channel adapter. The tail pointer in the host channel adapter is used by the host channel adapter to determine if the queue is empty. For completion queues, the head pointer in the channel interface is used to identify a next completion queue entry to be processed.
    Type: Application
    Filed: July 26, 2001
    Publication date: January 30, 2003
    Applicant: International Business Machines Corporation
    Inventors: David F. Craddock, Thomas Anthony Gregg, Ian David Judd, Gregory Francis Pfister, Renato John Recio, Donald William Schmidt
  • Patent number: 6148410
    Abstract: A fault tolerant recoverable connection device and methods are disclosed that include a primary router in an active state to provide a connection between clients and servers in a network, and a backup router in a standby state. The states of the primary and backup routers are switched when the primary router fails, the backup router has a better reach-ability state than the primary router, or by an operator command. Each router has a synchronization manager which maintains synchronized tables between the active and standby routers; a monitoring manager which monitors and switch the state of the routers; a reach-ability manager which monitors, updates, and compares the reach-ability set and state of the routers; and a keep alive manager which monitors the routers to provide a status notification to the monitoring manager.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: November 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Michael Edward Baskey, Donna Ngar-Ting Dillenberger, German Sergio Goldszmidt, Guerney Douglass Holloway Hunt, Eric Michel Levy-Abegnoli, Jeffrey Mark Nick, Donald William Schmidt