Abstract: A method of correcting a GPS vehicle trajectory of a vehicle on a roadway for a high-definition map is provided. The method comprises receiving first bitmap data from a first sensor of a first vehicle to create a plurality of first multi-layer bitmaps for the first vehicle using the first bitmap data and receiving second bitmap data from a plurality of second sensors of a plurality of second vehicles to create a plurality of second multi-layer bitmaps. The method further comprises creating first probability density bitmaps and an overall probability density bitmap with a probability density estimation, and matching an image template from each of the first probability density bitmaps with the overall probability density bitmap to define match results. The method further comprises combining the match results to define combined utility values and determining the maximal utility value with the combined utility values.

Abstract: A method of creating a high-definition (HD) map of a roadway includes receiving a multi-layer probability density bitmap. The multi-layer probability density bitmap represents a plurality of lane lines of the roadway sensed by a plurality of sensors of a plurality of vehicles. The multi-layer probability density bitmap includes a plurality of points. The method further includes recursively conducting a hill climbing search using the multi-layer probability density bitmap to create a plurality of lines. In addition, the method includes creating the HD map of the roadway using the plurality of lines determined by the hill climbing search.

Abstract: A system and method for creating, managing, and displaying 3D digital collectibles comprising a virtual, three dimensional, n-sided structure including a digital media file or set of digital media files representing an event rendered on a representation of at least a first surface thereof, and data relating to the event rendered on at least a second surface thereof and other content on one or more other surfaces, where the digital media file may be video clip of the event that can be played automatically via a media player associated with the display.

Abstract: A method includes receiving sensor data from a plurality of sensors of a plurality of vehicles. The sensor data includes vehicle GPS data and sensed lane line data of the roadway. The method further includes creating a plurality of multi-layer bitmaps for each of the plurality of vehicles using the sensor data, fusing the plurality of the multi-layer bitmaps of each of the plurality of vehicles to create a fused multi-layer bitmap, creating a plurality of multi-layer probability density bitmaps using the fused multi-layer bitmap, extracting lane line data from the plurality of multi-layer probability density bitmaps, and creating the high-definition (HD) map of the roadway using the multi-layer probability density bitmaps and the lane line data extracted from the plurality of multi-layer probability density bitmaps.

Abstract: An input switching circuit dynamically connects, based on an input mapping table, input streams to inputs of a wavefront pre-transform circuit. An output switching circuit dynamically connects, based on an output mapping table, output data at outputs of the wavefront pre-transform circuit to transport streams. A controller controls, based on a wiping command, at least one of the input and output switching circuits to alter at least one of the input and output mapping tables such that the at least one of the input and output switching circuits is disabled for connection. A first subset of the transport streams operates in a foreground mode available to a user and is transported for storage in remote storage sites at a network and a second subset of the transport streams operates in a background mode available to an administrator and is not transported for storage in the remote storage sites.

Abstract: A low voltage signaling differential signaling driver comprising a first output line coupled to a delay circuit, a first multiplexer and a first output buffer. The first output line is also coupled to an inverter, a second multiplexer and a second output buffer.

Abstract: A method for charge control of a photoflash capacitor. The method includes detecting a voltage on the photoflash capacitor, asserting and then latching a recharge signal when the detected voltage is lower than a first reference voltage, de-asserting and then latching the recharge signal when the detected voltage exceeds a second reference voltage, charging the photoflash capacitor when the recharge signal is asserted, and providing a pin for connection of a resistive element which determines the first reference voltage.

Abstract: A method for charge control of a photoflash capacitor. The method includes generating an input current to induce a charge current for the photoflash capacitor when an activation signal is asserted, detecting a first voltage from the photoflash capacitor and a second voltage corresponding to the input current, asserting and de-asserting a recharge signal respectively when the first detected voltage is lower and higher than a first reference voltage, asserting and de-asserting a current limit signal respectively when the second detected voltage is higher and lower than a second reference voltage, asserting the activation signal only when the recharge signal is asserted and the current limit signal is de-asserted, and providing a pin for connection of a resistive element which determines the second reference voltage.

Abstract: A combination PFC-PWM integrated circuit converter controller having a power factor correction stage and a pulse-width modulation stage. The power factor correction stage provides unity power factor and a regulated intermediate output voltage by sensing a current in the power factor correction circuit and by sensing the regulated intermediate output voltage in a voltage control loop. The regulated intermediate output voltage is sensed by an error amplifier that includes a current mirror. A dc supply voltage for powering the integrated circuit is generated that is representative of the regulated intermediate output voltage. The dc supply voltage is sensed for an overvoltage protection function. By sensing the intermediate regulated output voltage in the voltage control loop and by sensing the dc supply voltage for overvoltage protection, a component failure is less likely to affect both functions than if a single voltage was sensed for both functions.

Abstract: The present invention provides a circuit for supplying a verifying reference and measurement voltage for use in verifying the programming of a programmable cell. The present invention provides the verifying reference and measurement voltage through internal circuitry on the cell and eliminate any requirement for an externally provided reference voltage. The verifying voltage is provided by modifying the programming voltage. The programming voltage is stepped down or stepped up through the use of internal circuitry to provide the reference and measurement voltage.

Abstract: A CMOS circuit is disclosed for translating a signal from CML to CMOS logic voltage levels. The CMOS circuit includes two amplifier circuits coupled in parallel. The first amplifier circuit comprises of a programmable circuit and a CMOS inverter such that the CMOS inverter can be programmed "on" or "off" by the programmable circuit. The programmable circuit includes a programmable element which may be implemented using a fuse or floating gate technology. The second amplifying circuit comprises of a CMOS inverter. When the CMOS inverter in the first amplifier circuit is powered "on", the CMOS circuit is operating in a full power mode at high speed with both CMOS inverters operating. When the CMOS inverter in the first amplifier circuit is powered "off", the CMOS circuit is operating in a low power mode at a slower speed with only one CMOS inverter operating.