Abstract: An improved pressure control apparatus for a stirling module capable of controlling a pressure between compression space and a bounce space by providing an improved pressure control apparatus, so that a high speed operation of a stirling module can be obtained, which includes a piston including a plurality of pressure control hole groups vertically extended within the piston for connecting between the compression space and the bounce space, each of groups consists of at least one hole; a pressure control member supporting section having a diameter smaller than that of the piston and upwardly extended from the top of the piston; a support member engaging section having a diameter smaller than that of the pressure control member supporting section and upwardly extended from the top of the support member engaging section; and a pressure control member including an engaging section threadly engaged to the pressure control member supporting section and an opening/closing section having a plurality of wings.

Abstract: The present invention relates to a heat loss preventing apparatus for preventing a working gas of a high temperature which exist in an expansion space to flow directly to a compression space by providing a tip upwardly formed with the displacer and integrally provided in a form of cylinder at an upper end thereof and a baffle downwardly formed with an end of the cylinder and integrally provided at an upper portion of end of the cylinder, thereby increasing a heat efficiency of Stirling module, in particular more effectively reducing the heat loss by providing the tip and the baffle when the displacer is positioned either at a top dead point or at a bottom dead point.

Abstract: This invention provides a digital auto-phase-controlled retiming circuit which automatically locates the retiming clock phase in the center of input data eye pattern by detesting the phase difference between retiming clock and data and tracking adoptively the mutual phase variation in a case that the mutual phase difference between data and retiming clock is uncertain and changes according to time in digital transmission and/or digital signal processing systems.