Patents by Inventor Dong Pan

Dong Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230145787
    Abstract: A rubber compound for heavy-duty truck or bus tire treads may comprise: 5 to 100 parts by weight per hundred parts by weight rubber (phr) of a long chain branched cyclopentene ring opening rubber (LCB-CPR) having a glass transition temperature (Tg) of ?120° C. to ?80° C., a g?vis of 0.50 to 0.91, and a ratio of cis-to-trans of 40:60 to 5:95; 0 phr to 95 phr of a rubber selected from a group consisting of a natural rubber (NR), a polybutadiene rubber (BR), and a combination thereof; 30 phr to 90 phr of a reinforcing filler; and 0.5 phr to 20 phr of a process oil.
    Type: Application
    Filed: February 26, 2021
    Publication date: May 11, 2023
    Inventors: Alan A. Galuska, Alexander V. Zabula, Yong Yang, Carlos R. Lopez-Barron, Brian J. Rohde, Xiao-Dong Pan, Wen J. Liu
  • Publication number: 20230130953
    Abstract: A rubber compound suitable for passenger tires may comprise: 40 to 70 parts by weight per hundred parts by weight rubber (phr) of a long chain branched cyclopentene ring-opening rubber (LCB-CPR) having a glass transition temperature (Tg) of ?120° C. to ?80° C., a g?vis of 0.50 to 0.91, and a ratio of cis to trans of 40:60 to 5:95, 30 phr to 60 phr of a styrene-butadiene rubber (SBR), wherein the SBR has a glass transition temperature (Tg) of ?60° C. to ?5° C., 50 phr to 110 phr of a reinforcing filler, and 20 phr to 50 phr of a process oil.
    Type: Application
    Filed: February 26, 2021
    Publication date: April 27, 2023
    Inventors: Xiao-Dong Pan, Alan A. Galuska, Feng Li, Nieves Hernandez, JR.
  • Patent number: 11632084
    Abstract: Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Wei Lu Chu, Zhi Qi Huang, Dong Pan
  • Patent number: 11626152
    Abstract: Apparatuses and methods for pure-time, self-adopt sampling for RHR refresh. An example apparatus includes a memory bank comprising a plurality of rows each associated with a respective row address, and a sampling timing generator circuit configured to provide a timing signal having a plurality of pulses. Each of the plurality of pulses is configured to initiate sampling of a respective row address associated with a row of the plurality of rows to detect a row hammer attack. The sampling timing generator includes first circuitry configured to provide a first subset of pulses of the plurality of pulses during a first time period and includes second circuitry configured to initiate provision of a second subset of pulses of the plurality of pulses during a second time period after the first time period.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 11, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jun Wu, Dong Pan
  • Patent number: 11605169
    Abstract: A method for detecting a flow velocity of a high-temperature molten fluid can include: collecting a video stream of a high-temperature high-velocity molten fluid, decomposing the video stream into a frame image sequence sorted by time, and extracting a molten fluid Region Of Interest (ROI) from the frame image sequence, extracting a molten fluid outline of the molten fluid ROI, and extracting a characteristic block of the molten fluid outline, and obtaining the flow velocity of the molten fluid based on the characteristic block. A flow velocity detection accuracy can be improved for a molten fluid with a high temperature, a high velocity and a high glossiness.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: March 14, 2023
    Assignee: CENTRAL SOUTH UNIVERSITY
    Inventors: Zhaohui Jiang, Lei He, Zhipeng Chen, Weihua Gui, Dong Pan, Chunhua Yang, Yongfang Xie, Haifeng Zhang
  • Patent number: 11587602
    Abstract: Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan
  • Patent number: 11588555
    Abstract: Various embodiments of a monolithic transceiver are described, which may be fabricated on a semiconductor substrate. The monolithic transceiver includes a coherent receiver module (CRM), a coherent transmitter module (CTM), and a local oscillation splitter to feed a local oscillation to the CRM and the CTM with a tunable power ratio. The monolithic transceiver provides tunable responsivity by employing photodiodes for opto-electrical conversion. The monolithic transceiver also employs a polarization beam rotator-splitter (PBRS) and a polarization beam rotator-combiner (PBRC) for supporting modulation schemes including polarization multiplexed quadrature amplitude modulation (PM-QAM) and polarization multiplexed quadrature phase shift keying (PM-QPSK).
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: February 21, 2023
    Inventors: Pengfei Cai, Zhou Fang, Yi Li, Ning Zhang, Rangchen Yu, Ching-yin Hong, Dong Pan
  • Publication number: 20230034057
    Abstract: A semiconductor device may include a bandgap circuit that outputs a reference voltage. The bandgap circuit may include a bandgap core circuit and a startup circuit coupled to the bandgap core circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap core circuit in response to the bandgap core circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the output voltage being equal to or greater than a desired voltage (e.g., a threshold voltage) and one or more local voltages of the bandgap core circuit being equal to or greater than a local threshold voltage.
    Type: Application
    Filed: August 2, 2021
    Publication date: February 2, 2023
    Inventors: Suresh Chattu, Wei Lu Chu, Dong Pan
  • Publication number: 20230006202
    Abstract: The present disclosure provides a lithium manganate positive electrode active material, comprising a lithium manganate matrix and a cladding layer, where the cladding layer comprises an organic bonding material, one or more A-type salts, and one or more B-type salts. The lithium manganate positive electrode active material of the present disclosure significantly reduces the content of transition metal manganese ions within a battery through combined action of the organic bonding material, the A-type salts, and the B-type salts, thereby slowing down the decomposition and consumption of the SEI film (solid electrolyte interphase) by transition metal manganese, and improving the capacity retention rate and impedance performance of the battery.
    Type: Application
    Filed: August 24, 2022
    Publication date: January 5, 2023
    Inventors: Shaocong Ouyang, Chenghua Fu, Tingzhen Xie, Dong Pan, Yonghuang Ye
  • Publication number: 20230002545
    Abstract: Rubber compounds may comprise: an epoxidized polypentenamer rubber (CPR) and/or a hydrolyzed epoxidized CPR; and a filler comprising silica particles. One nonlimiting example is rubber compound comprising: phr to 90 phr of a styrene-butadiene rubber (SBR), a natural rubber (NR), and/or a butadiene rubber (BR); 10 phr to 50 phr of a epoxidized CPR and/or a hydrolyzed epoxidized CPR; and 10 phr to 200 phr of a filler comprising silica particles, wherein the SBR, the NR, the BR, the epoxidized CPR, and the hydrolyzed epoxidized CPR combined equal 100 parts. Rubber compounds comprising epoxidized CPR and/or a hydrolyzed epoxidized CPR; and a filler comprising silica particles may be useful in tire compositions.
    Type: Application
    Filed: November 18, 2020
    Publication date: January 5, 2023
    Inventors: Mika L. Shiramizu, Xiao-Dong Pan, Alexander V. Zabula, Carlos R. Lopez-Barron, Alan A. Galuska, Yong Yang
  • Patent number: 11545940
    Abstract: Devices and methods include voltage buses. The devices also include one or more power amplifiers coupled to the voltage bus. Each of the one or more power amplifiers include one or more transistors. The devices also include a model that is configured to emulate leakage from at least one of the one or more transistors. A current mirror with a first transistor coupled to the model and a second transistor coupled to the voltage bus. The current mirror is configure to draw charge from the voltage bus based at least in part on the emulated leakage from the model.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 3, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Wei Lu Chu, Dong Pan
  • Publication number: 20220415427
    Abstract: Counters may be provided for individual word lines of a memory for tracking word line accesses. In some examples, multiple counters may be provided for individual word lines. In some examples, the counters may be included on the word lines. The counters may be incremented responsive to word line accesses in some examples. In some examples, the counters may be incremented responsive for a time period for which a word line is held open. In some examples, the counters may be incremented responsive to both word line accesses and time periods for which the word line is held open. In some examples, count values for the counters may be written back to the counters after incrementing. In some examples, the count values may be written back prior to receiving a precharge command.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 29, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Dong Pan
  • Publication number: 20220352855
    Abstract: Devices and methods include voltage buses. The devices also include one or more power amplifiers coupled to the voltage bus. Each of the one or more power amplifiers include one or more transistors. The devices also include a model that is configured to emulate leakage from at least one of the one or more transistors. A current mirror with a first transistor coupled to the model and a second transistor coupled to the voltage bus. The current mirror is configure to draw charge from the voltage bus based at least in part on the emulated leakage from the model.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 3, 2022
    Inventors: Wei Lu Chu, Dong Pan
  • Publication number: 20220352882
    Abstract: Methods and apparatuses are provided for temperature independent resistive-capacitive delay circuits of a semiconductor device. For example, delays associated with ZQ calibration or timing of the RAS chain may be implemented that to include circuitry that exhibits both proportional to absolute temperature (PTAT) characteristics and complementary to absolute temperature (CTAT) characteristics in order to control delay times across a range of operating temperatures. The RC delay circuits may include a first type of circuitry having impedance with PTAT characteristics that is coupled to an output node in parallel with a second type of circuitry having impedance with CTAT characteristics. The first type of circuitry may include a resistor and the second type of circuitry may include a transistor, in some embodiments.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 3, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zhiqi Huang, Weilu Chu, Dong Pan
  • Publication number: 20220343964
    Abstract: Methods, systems, and devices for compensating for kickback noise are described. A regulator may include an input circuit, a bias circuit, and an enable circuit. The regulator may be configured so that the enable circuit is positioned between the input circuit and the bias circuit. A balance resistor may be included in a path between an input of the regulator and a gate of a bias transistor included in the bias transistor. A size of the balance resistor may be based on an amount of charge drawn by the bias transistor during an activation event. Dimensions of the bias transistor may be modified based on an amount of charge drawn by the bias transistor during an activation event.
    Type: Application
    Filed: July 13, 2022
    Publication date: October 27, 2022
    Inventors: Wei Lu Chu, Dong Pan
  • Patent number: 11480817
    Abstract: Various embodiments of a coplanar waveguide (CPW) transmission line as well as a silicon-based electro-optic (E-O) modulator comprising the CPW transmission line are described. The CPW transmission line has a curved or winding shape. The silicon-based E-O modulator includes a rib optical waveguide, a beam splitter, a beam combiner, and a CPW transmission line that exhibits the winding shape. At least one of the two optical arms of the rib optical waveguide alternately and periodically extends through a first groove and a second groove of the CPW transmission line. The plurality of active sections of the rib optical waveguide are evenly distributed on both sides of the CPW transmission line to suppress undesired transmission modes. An increased length of transmission path of the rib optical waveguide is also avoided or minimized, thereby reducing the transmission speed mismatch of the E-O modulator, which is essential for achieving high-speed operation.
    Type: Grant
    Filed: March 6, 2021
    Date of Patent: October 25, 2022
    Inventors: Yadong Liu, Pengfei Cai, Tzung-I Su, Dong Pan
  • Patent number: 11461773
    Abstract: Systems and methods for blockchain-based node management. In an aspect, a system receives, by an existing node of a blockchain, a target transaction, wherein the target transaction comprises a certificate of a new node and a unique identifier of the new node; verifies the target transaction by the target transaction passing consensus verification of the blockchain; and after the target transaction passes consensus verification of the blockchain to verify the blockchain, records, in a node identity table that is used to record a certificate of a blockchain node and a unique identifier that is of the blockchain node and that corresponds to the certificate, the unique identifier and the certificate of the new node.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: October 4, 2022
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Dong Pan
  • Patent number: 11462291
    Abstract: Counters may be provided for individual word lines of a memory for tracking word line accesses. In some examples, multiple counters may be provided for individual word lines. In some examples, the counters may be included on the word lines. The counters may be incremented responsive to word line accesses in some examples. In some examples, the counters may be incremented responsive for a time period for which a word line is held open. In some examples, the counters may be incremented responsive to both word line accesses and time periods for which the word line is held open. In some examples, count values for the counters may be written back to the counters after incrementing. In some examples, the count values may be written back prior to receiving a precharge command.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: October 4, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Dong Pan
  • Publication number: 20220311335
    Abstract: A multi-mode voltage pump may be configured to select an operational mode based on a temperature of a semiconductor device. The selected mode for a range of temperature values may be determined based on process variations and operational differences caused by temperature changes. The different selected modes of operation of the multi-mode voltage pump may provide pumped voltage having different voltage magnitudes. For example, the multi-mode voltage pump may operate in a first mode that uses two stages to provide a first VPP voltage, a second mode that uses a single stage to provide a second VPP voltage, or a third mode that uses a mixture of a single stage and two stages to provide a third VPP voltage. The third VPP voltage may be between the first and second VPP voltages, with the first VPP voltage having the greatest magnitude. Control signal timing of circuitry of the multi-mode voltage pump may be based on an oscillator signal.
    Type: Application
    Filed: June 14, 2022
    Publication date: September 29, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Dong Pan, Beau D. Barry, Liang Liu
  • Patent number: 11450373
    Abstract: Methods, systems, and devices for compensating for kickback noise are described. A regulator may include an input circuit, a bias circuit, and an enable circuit. The regulator may be configured so that the enable circuit is positioned between the input circuit and the bias circuit. A balance resistor may be included in a path between an input of the regulator and a gate of a bias transistor included in the bias transistor. A size of the balance resistor may be based on an amount of charge drawn by the bias transistor during an activation event. Dimensions of the bias transistor may be modified based on an amount of charge drawn by the bias transistor during an activation event.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: September 20, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Wei Lu Chu, Dong Pan