Abstract: The present disclosure relates to an organic light emitting diode and an organic light emitting device including the same. The organic light emitting diode includes a first electrode; a second electrode facing the first electrode; and a first blue emitting material layer including a first compound and a second compound and positioned between the first and second electrodes, wherein the first compound is represented by Formula 1, and the second compound is represented by Formula 3. According to an aspect of the present disclosure, it is allowed to provide an OLED and an organic light emitting device having high emitting efficiency and/or improved lifespan.

Abstract: The present invention relates to an organic light emitting diode and an organic light emitting device including the organic light emitting diode. The organic light emitting diode includes a first electrode; a second electrode facing the first electrode; and a first blue emitting material layer including a first compound, a second compound and a third compound and positioned between the first and second electrodes, wherein the first compound is represented by Formula 1, the second compound is represented by Formula 3, and the third compound is represented by Formula 5, and wherein in the first blue emitting material layer, a summation of a weight % of the first compound, a weight % of the second compound and a weight % of the third compound is 100%, and the weight % of each of the first and second compounds is greater than the weight % of the third compound.

Abstract: A recombinant Mycobacterium strain co-expressing MIF and IL-7, and a composition containing the strain as an active ingredient are disclosed. The strain and the composition are suitable for preventing or treating cancer. The strain induces a maximized anticancer immune response by stably expressing MIF and IL-7 through a mycobacteria-derived replicable plasmid, such as a pMyong2 shuttle vector. Accordingly, the strain and the composition may be usefully used as an efficient anticancer live vaccine composition that induces multiple cellular and humoral immune responses through single administration of the recombinant strain.

Abstract: An apparatus of verifying a software integrity of a vehicle controller and a method thereof includes a communication device that provides a communication interface with a software management system, and a controller which is configured to obtain first verification data of the vehicle controller from the software management system, obtains second verification data from the vehicle controller, and verifies an integrity of software loaded in the vehicle controller based on the obtained first verification data and the obtained second verification data.

Abstract: Provided is a portable apparatus for measuring a manipulation force. The apparatus includes a manipulation force measurement unit configured to measure a manipulation force applied on a manipulated part in a first direction of pushing forward or pulling backward and measure a manipulation force in a second direction of moving toward left or right, and a controller configured to process the measured manipulation force to generate manipulation force information over time.

Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: The present invention provides a composition for antifreezing including a gold (Au) nanostructure in which at least a portion thereof is concave, thereby it is possible to increase a survival rate of cells due to having excellent effect of inhibiting ice recrystallization when cryopreservation of the cells, and maintain a texture of food even when using in the freezing of food.

Abstract: A a composition for prevention or treatment of a Staphylococcus aureus infectious disease and a composition for prevention or treatment of a thrombotic disorder caused by Staphylococcus aureus infection are disclosed. Cell lysis by 11 toxins of Staphylococcus aureus can be thoroughly inhibited by using the cross-reactivity of antibodies against Staphylococcus aureus toxins, even with a minimal combination of antigens. The composition can be used as an effective therapeutic composition that can comprehensively remove or alleviate comprehensive pathological conditions caused by infection, away from piecemeal amelioration of individual symptoms caused by Staphylococcus aureus infection, by inducing opsonophagocytosis and effectively controlling blood coagulation in infected individuals.

Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

Abstract: A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.

Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

Abstract: A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below, [GeASeBTeC](1-U)[X]U??(1) where 0.20?A?0.40, 0.40?B?0.70, 0.05?C?0.25, A+B+C=1, 0.0?U?0.20, and X is at least one selected from boron (B), carbon (C), nitrogen (N), oxygen (O), phosphorus (P), or sulfur (S).

Abstract: A variable resistance memory device including a selection pattern; an intermediate electrode contacting a first surface of the selection pattern; a variable resistance pattern on an opposite side of the intermediate electrode relative to the selection pattern; and a first electrode contacting a second surface of the selection pattern and including a n-type semiconductor material, the second surface of the selection pattern being opposite the first surface thereof.

Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

Abstract: A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.

Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

Abstract: A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below, [GeXSiY(AsaTe1-a)Z](1-U)[N]U??(1) (where 0.05?X?0.1, 0.15?Y?0.25, 0.7?Z?0.8, X+Y+Z=1, 0.45?a?0.6, and 0.08?U?0.2).

Abstract: A variable resistance memory device may include: a first electrode layer; a selection device layer on the first electrode layer, the selection device layer including a chalcogenide switching material consisting essentially of germanium (Ge), selenium (Se), and antimony (Sb), wherein a content of the Ge is less than a content of the Se based on an atomic weight; a second electrode layer on the selection device layer; a variable resistance layer on the second electrode layer, the variable resistance layer including a chalcogenide material; and a third electrode layer on the variable resistance layer.