Abstract: The present disclosure provides a display substrate, a manufacturing method thereof and a display apparatus, and relates to the field of display technology. The manufacturing method of a display substrate includes providing a base substrate, and forming pixels on the base substrate, wherein the forming pixels includes: forming a first auxiliary electrode on the base substrate; forming a first interlayer insulating layer on a side of the first auxiliary electrode away from the base substrate; sequentially forming a second conductive film and a first photoresist layer, exposing the first photoresist layer with a mask plate having regions of different light transmittances by controlling exposure time based on requirements on an operating frequency band of the pixels, to form a source electrode and a drain electrode of the thin film transistor and a second auxiliary electrode, forming a second interlayer insulating layer; and forming a pixel electrode.

Abstract: An array substrate includes a gate layer, a first insulating layer, a channel layer, a source-drain layer, a second insulating layer, and a common electrode layer that are sequentially stacked, wherein the second insulating lay is provided with via holes formed therein; and the source-drain layer includes a plurality of sources, a plurality of drains, a plurality of data lines and a plurality of common electrode signal lines. The common electrode signal line includes a plurality of common electrode signal line segments, each of the common electrode signal line segments passes through at least one sub-pixel row, and each of the common electrode signal line segments is connected to the common electrode layer through the via hole.

Abstract: The present disclosure relates to the field of display technology, and provides an array substrate and a display panel. The array substrate is provided with a via hole and further includes an annular wiring area. The annular wiring area is located around the via hole and is provided with an incision extending toward an outer edge of the annular wiring area along an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the inner edge.

Abstract: An array substrate includes a base, a plurality of thin film transistors, a passivation layer, at least one reflective electrode, and at least one first connecting electrode. The array substrate has a display area. The thin film transistors are disposed in the display area on the base. The passivation layer covers the thin film transistors, and has at least one first via hole in the display area. The reflective electrode is disposed on a surface of the passivation layer facing away from the base, and is disposed in the display area and uncovers the first via hole. The first connecting electrode is disposed on a side of the reflective electrode away from the base. Each first connecting electrode is connected to a corresponding reflective electrode, and is connected to a source or a drain of a corresponding thin film transistor through a corresponding first via hole.

Abstract: The application relates to the technical field of display, and discloses a display panel, a preparation method thereof and a display device. The display panel includes: a rigid base substrate; a flexible insulating layer having a first part and a second part, the first part being disposed on the base substrate, the second part exceeding a side edge of the base substrate; and an integrated circuit chip and a flexible printed circuit respectively bonded and connected with the second part of the flexible insulating layer.

Abstract: The present disclosure provides an electronic paper display module, including an array substrate and an electronic paper film arranged opposite to each other. The electronic paper film includes a common electrode, the array substrate includes a display region and a peripheral region, and a common electrode lead is located at the peripheral region. An orthogonal projection of the electronic paper film onto the array substrate at least covers the display region, and the common electrode lead is provided with a hollowed-out region.

Abstract: An array substrate includes a gate layer, a first insulating layer, a channel layer, a source-drain layer, a second insulating layer, and a common electrode layer that are sequentially stacked, wherein the second insulating lay is provided with via holes formed therein; and the source-drain layer includes a plurality of sources, a plurality of drains, a plurality of data lines and a plurality of common electrode signal lines. The common electrode signal line includes a plurality of common electrode signal line segments, each of the common electrode signal line segments passes through at least one sub-pixel row, and each of the common electrode signal line segments is connected to the common electrode layer through the via hole.

Abstract: The present disclosure relates to a detection circuit. The detection circuit includes a first input circuit and a second input circuit. The first input circuit has multiple first switch units, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. The second input circuit has multiple second switch units connected in a cascade arrangement, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. A second terminal of the second switch unit in a previous stage is connected to a first terminal of the second switch unit in the next adjacent stage. The first terminal of the second switch unit of a first stage is connected to a second terminal of a corresponding first signal line. The second terminal of the second switch unit of a last stage is connected to a first detection terminal.

Abstract: The present disclosure relates to a detection circuit. The detection circuit includes a first input circuit and a second input circuit. The first input circuit has multiple first switch units, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. The second input circuit has multiple second switch units connected in a cascade arrangement, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. A second terminal of the second switch unit in a previous stage is connected to a first terminal of the second switch unit in the next adjacent stage. The first terminal of the second switch unit of a first stage is connected to a second terminal of a corresponding first signal line. The second terminal of the second switch unit of a last stage is connected to a first detection terminal.

Abstract: The present disclosure relates to the field of display technology, and provides an array substrate and a display panel. The array substrate is provided with a via hole and further includes an annular wiring area. The annular wiring area is located around the via hole and is provided with an incision extending toward an outer edge of the annular wiring area along an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the inner edge.

Abstract: An array substrate includes a base, a plurality of thin film transistors, a passivation layer, at least one reflective electrode, and at least one first connecting electrode. The array substrate has a display area. The thin film transistors are disposed in the display area on the base. The passivation layer covers the thin film transistors, and has at least one first via hole in the display area. The reflective electrode is disposed on a surface of the passivation layer facing away from the base, and is disposed in the display area and uncovers the first via hole. The first connecting electrode is disposed on a side of the reflective electrode away from the base. Each first connecting electrode is connected to a corresponding reflective electrode, and is connected to a source or a drain of a corresponding thin film transistor through a corresponding first via hole.

Abstract: The application relates to the technical field of display, and discloses a display panel, a preparation method thereof and a display device. The display panel includes: a rigid base substrate; a flexible insulating layer having a first part and a second part, the first part being disposed on the base substrate, the second part exceeding a side edge of the base substrate; and an integrated circuit chip and a flexible printed circuit respectively bonded and connected with the second part of the flexible insulating layer.

Abstract: The present application relates to a grating assembly, a display device, a control method thereof and a storage medium, in the field of display technology. The grating assembly comprises: a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate. The first substrate is provided with a power supply electrode on a side adjacent to the liquid crystal layer, and the second substrate is provided with k strip electrodes on a side adjacent to the liquid crystal layer. The k strip electrodes are connected to form a coil.

Abstract: Disclosed is a shift register unit and a driving method therefor. The shift register unit includes an input circuit that is connected to a first input end and a second input end; a pull-up circuit that is connect to an output end; a first pull-down circuit and a second pull-down circuit; and where the input circuit is configured to receive a first power signal, and a second power signal, and the input circuit is controlled by the first power signal and the second power signal; the first pull-down circuit and the second pull-down circuit are connected to the input circuit and the pull-up circuit, and each first pull-down circuit is configured to receive a control signal; and the pull-up circuit is configured to receive a clock signal.

Abstract: Disclosed is a shift register unit and a driving method therefor. The shift register unit includes an input circuit that is connected to a first input end and a second input end; a pull-up circuit that is connect to an output end; a first pull-down circuit and a second pull-down circuit; and where the input circuit is configured to receive a first power signal, and a second power signal, and the input circuit is controlled by the first power signal and the second power signal; the first pull-down circuit and the second pull-down circuit are connected to the input circuit and the pull-up circuit, and each first pull-down circuit is configured to receive a control signal; and the pull-up circuit is configured to receive a clock signal.

Abstract: The present application relates to a grating assembly, a display device, a control method thereof and a storage medium, in the field of display technology. The grating assembly comprises: a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate. The first substrate is provided with a power supply electrode on a side adjacent to the liquid crystal layer, and the second substrate is provided with k strip electrodes on a side adjacent to the liquid crystal layer. The k strip electrodes are connected to form a coil.

Abstract: A pixel circuit and a driving method thereof and a display device. The pixel circuit includes: a first reverse bias unit, and a first sub-pixel circuit and a second sub-pixel circuit adjacent to each other. The first sub-pixel circuit includes a first light-emitting unit; the second sub-pixel circuit includes a second light-emitting unit. The first light-emitting unit is connected with a first drive node and a second bias output node; the second light-emitting unit is connected with a second drive node and a first bias output node; the first reverse bias unit is connected with the first drive node, the second drive node, the second bias output node, the first bias output node, a first bias control terminal and a second bias control terminal.

Abstract: The disclosure discloses an array substrate, a method for manufacturing the same, and a display panel, and the array substrate includes a gate, an active layer, a source, and a drain arranged on a base substrate in that order; and further includes: a light blocking layer, where a positive projection of the active layer onto the base substrate overlaps with both of a positive projection of the light blocking layer onto the base substrate, and a positive projection of the gate onto the base substrate; the positive projection of the active layer onto the base substrate lies in positive projections of the light blocking layer and the gate onto the base substrate; and an area of the positive projection of the gate onto the base substrate is smaller than an area of the positive projection of the active layer onto the base substrate.

Abstract: A touch scanning circuit and a driving method thereof, a touch driving circuit and a display panel. The touch scanning circuit includes: an input sub-circuit, a first control sub-circuit, a second control sub-circuit, a shift output sub-circuit and a touch output sub-circuit. The input sub-circuit is configured to control a potential of a first node; the first control sub-circuit is configured to control connection and disconnection between the first node and a third node; the second control sub-circuit is configured to control a potential of a second node; the shift output sub-circuit is configured to control a potential of a shift output end according to the third node and the second node; and the touch output sub-circuit is configured to control a signal outputted from a touch output end according to the second node, the shift output end and the first clock signal end.

Abstract: A pixel circuit and a driving method thereof and a display device. The pixel circuit includes: a first reverse bias unit, and a first sub-pixel circuit and a second sub-pixel circuit adjacent to each other. The first sub-pixel circuit includes a first light-emitting unit; the second sub-pixel circuit includes a second light-emitting unit. The first light-emitting unit is connected with a first drive node and a second bias output node; the second light-emitting unit is connected with a second drive node and a first bias output node; the first reverse bias unit is connected with the first drive node, the second drive node, the second bias output node, the first bias output node, a first bias control terminal and a second bias control terminal.