Patents by Inventor Dongwoo NAM
Dongwoo NAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240184480Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.Type: ApplicationFiled: February 12, 2024Publication date: June 6, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Dongwoo NAM, Sungho SEO, Kwanwoo NOH, Myungsub SHIN, Haesung JUNG
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Publication number: 20240170554Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern extending in a first direction on a substrate; channel layers arranged on the active pattern; a gate structure crossing the active pattern, and surrounding the plurality of channel layers, the gate structure extending in a second direction that crosses the first direction; and source/drain regions provided on the active pattern on both sides of the gate structure, and including a first epitaxial layer connected to each of side surfaces of the channel layers, and a second epitaxial layer provided on the first epitaxial layer and having a composition different from that of the first epitaxial layer. Each of the side surfaces of the plurality of channel layers has a crystal plane of (111) or (100). The first epitaxial layer extends in the second direction and has a first thickness in the first direction that is substantially constant.Type: ApplicationFiled: November 16, 2023Publication date: May 23, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyojin Kim, Jinbum Kim, Sangmoon Lee, Dongwoo Kim, Sungmin Kim, Yongjun Nam, Ingeon Hwang
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Patent number: 11934691Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.Type: GrantFiled: April 21, 2023Date of Patent: March 19, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Dongwoo Nam, Sungho Seo, Kwanwoo Noh, Myungsub Shin, Haesung Jung
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Publication number: 20240085940Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.Type: ApplicationFiled: November 14, 2023Publication date: March 14, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Kwanwoo NOH, Sungho SEO, Yongwoo JEONG, Dongwoo NAM, Myungsub SHIN, Hyunkyu JANG
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Patent number: 11874695Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.Type: GrantFiled: December 9, 2022Date of Patent: January 16, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Kwanwoo Noh, Sungho Seo, Yongwoo Jeong, Dongwoo Nam, Myungsub Shin, Hyunkyu Jang
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Publication number: 20230259303Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.Type: ApplicationFiled: April 21, 2023Publication date: August 17, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Dongwoo NAM, Sungho Seo, Kwanwoo Noh, Myungsub Shin, Haesung Jung
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Patent number: 11675531Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.Type: GrantFiled: May 24, 2021Date of Patent: June 13, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Dongwoo Nam, Sungho Seo, Kwanwoo Noh, Myungsub Shin, Haesung Jung
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Publication number: 20230112284Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.Type: ApplicationFiled: December 9, 2022Publication date: April 13, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Kwanwoo NOH, Sungho SEO, Yongwoo JEONG, Dongwoo NAM, Myungsub SHIN, Hyunkyu JANG
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Patent number: 11625342Abstract: A storage device capable of performing high-speed link startup and a storage system including the storage device are disclosed. A link startup method of the storage device includes receiving a line-reset signal from a host through a line connected to an input signal pin of the storage device, comparing a length of the received line-reset signal with a first reference time, and performing a link startup operation in a high-speed mode or a low-speed mode between the storage device and the host according to a comparing result.Type: GrantFiled: April 27, 2021Date of Patent: April 11, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungho Seo, Kwanwoo Noh, Myungsub Shin, Dongwoo Nam
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Patent number: 11561571Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.Type: GrantFiled: February 19, 2021Date of Patent: January 24, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Kwanwoo Noh, Sungho Seo, Yongwoo Jeong, Dongwoo Nam, Myungsub Shin, Hyunkyu Jang
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Publication number: 20210397368Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.Type: ApplicationFiled: May 24, 2021Publication date: December 23, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Dongwoo NAM, Sungho SEO, Kwanwoo NOH, Myungsub SHIN, Haesung JUNG
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Publication number: 20210334225Abstract: A storage device capable of performing high-speed link startup and a storage system including the storage device are disclosed. A link startup method of the storage device includes receiving a line-reset signal from a host through a line connected to an input signal pin of the storage device, comparing a length of the received line-reset signal with a first reference time, and performing a link startup operation in a high-speed mode or a low-speed mode between the storage device and the host according to a comparing result.Type: ApplicationFiled: April 27, 2021Publication date: October 28, 2021Inventors: Sungho Seo, Kwanwoo Noh, Myungsub Shin, Dongwoo Nam
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Publication number: 20210263550Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.Type: ApplicationFiled: February 19, 2021Publication date: August 26, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Kwanwoo NOH, Sungho SEO, Yongwoo JEONG, Dongwoo NAM, Myungsub SHIN, Hyunkyu JANG