Patents by Inventor Doo-Hyoung Lee

Doo-Hyoung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230170441
    Abstract: Provided are a light emitting device and a display apparatus comprising the same. The light emitting device comprises a light emitting device core extending in one direction, and a transmission filter layer surrounding a part of the side surface of the light emitting device core, wherein the side surface of the light emitting device core comprises a first area having the transmission filter layer arranged therein, and a second area not having the transmission filter layer arranged therein.
    Type: Application
    Filed: April 23, 2021
    Publication date: June 1, 2023
    Inventors: Mi Hyang SHEEN, Sang Hyung LIM, Myeong Kyu PARK, Na Ri AHN, Doo Hyoung LEE
  • Patent number: 11621312
    Abstract: A display device includes a first conductive pattern on a substrate, a first insulating layer on the first conductive pattern, a semiconductor pattern on the first insulating layer, a second insulating layer on the first insulating layer and the semiconductor pattern, and a second conductive pattern on the second insulating layer. A first edge of the first conductive pattern faces a second edge of the second conductive pattern, the first conductive pattern does not overlap the second conductive pattern in an area where the first edge faces the second edge, the semiconductor pattern is in the area where the first edge faces the second edge, the second conductive pattern overlaps the second insulating layer, and the second insulating layer includes a third edge protruding from the second edge of the second conductive pattern.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: April 4, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Hyung Lim, Jee Hoon Kim, Mi Hyang Sheen, Jin Ho Jang, Myeong Kyu Park, Na Ri Ahn, Hui Won Yang, Doo Hyoung Lee
  • Publication number: 20210296422
    Abstract: A display device includes a first conductive pattern on a substrate, a first insulating layer on the first conductive pattern, a semiconductor pattern on the first insulating layer, a second insulating layer on the first insulating layer and the semiconductor pattern, and a second conductive pattern on the second insulating layer. A first edge of the first conductive pattern faces a second edge of the second conductive pattern, the first conductive pattern does not overlap the second conductive pattern in an area where the first edge faces the second edge, the semiconductor pattern is in the area where the first edge faces the second edge, the second conductive pattern overlaps the second insulating layer, and the second insulating layer includes a third edge protruding from the second edge of the second conductive pattern.
    Type: Application
    Filed: November 4, 2020
    Publication date: September 23, 2021
    Applicant: Samsung Display Co., LTD.
    Inventors: Sang Hyung LIM, Jee Hoon KIM, Mi Hyang SHEEN, Jin Ho JANG, Myeong Kyu PARK, Na Ri AHN, Hui Won YANG, Doo Hyoung LEE
  • Patent number: 10546959
    Abstract: A transistor includes a gate electrode, a semiconductor layer overlapping the gate electrode, the semiconductor layer including an oxide semiconductor, and a source electrode and a drain electrode spaced apart from the source electrode, wherein the source and drain electrodes are connected to the semiconductor layer. The semiconductor layer includes a plurality of layers, wherein a crystallinity of a layer of the plurality of layers of the semiconductor layer is a ratio of a crystalline oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer, to an amorphous oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer. A first layer of the plurality of layers of the semiconductor layer has a different crystallinity with respect to a second layer of the plurality of layers of the semiconductor layer.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: January 28, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung Wook Woo, Chang Ho Lee, Kyung Lae Rho, Doo Hyoung Lee, Sung Chan Jo, Sang Woo Sohn, Sang Won Shin, Soo Im Jeong, Chang Yong Jeong
  • Publication number: 20180040739
    Abstract: A transistor includes a gate electrode, a semiconductor layer overlapping the gate electrode, the semiconductor layer including an oxide semiconductor, and a source electrode and a drain electrode spaced apart from the source electrode, wherein the source and drain electrodes are connected to the semiconductor layer. The semiconductor layer includes a plurality of layers, wherein a crystallinity of a layer of the plurality of layers of the semiconductor layer is a ratio of a crystalline oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer, to an amorphous oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer. A first layer of the plurality of layers of the semiconductor layer has a different crystallinity with respect to a second layer of the plurality of layers of the semiconductor layer.
    Type: Application
    Filed: July 28, 2017
    Publication date: February 8, 2018
    Inventors: SUNG WOOK WOO, Chang Ho Lee, Kyung Lae Rho, Doo Hyoung Lee, Sung Chan Jo, Sang Woo Sohn, Sang Won Shin, Soo Im Jeong, Chang Yong Jeong
  • Publication number: 20160300950
    Abstract: A thin film transistor array panel includes a gate line disposed on a substrate, the gate line including a gate electrode, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the substrate, the semiconductor layer including an oxide semiconductor, a data line disposed on the substrate and crossing the gate line, a data line layer including a source electrode connected to the data line and a drain electrode facing the source electrode, and a passivation layer covering the source electrode and the drain electrode. The data line layer includes copper or a copper alloy, and the semiconductor layer includes a copper doped oxide semiconductor. A content of copper doped on the oxide semiconductor is 0.2% to 0.82%.
    Type: Application
    Filed: October 20, 2015
    Publication date: October 13, 2016
    Inventors: Hyeon Jun LEE, Ki Won Kim, Yoo Ho Kim, Joon Geol Kim, Doo Hyoung Lee
  • Patent number: 9406785
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: August 2, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 9136342
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: September 15, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeon Taek Jeong, Bo Sung Kim, Doo-Hyoung Lee, June Whan Choi, Tae-Young Choi, Kano Masataka
  • Patent number: 9115287
    Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: August 25, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon-Taek Jeong, Bo-Sung Kim, Doo-Hyoung Lee, Doo-Na Kim, Eun-Hye Park, Dong-Lim Kim, Hyun-Jae Kim, You-Seung Rim, Hyun-Soo Lim
  • Patent number: 9082795
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: July 14, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Chan Woo Yang, Seung-Ho Jung, Doo Na Kim, Bo Sung Kim, Eun Hye Park, June Whan Choi
  • Publication number: 20150044817
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Application
    Filed: October 22, 2014
    Publication date: February 12, 2015
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Wood Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Publication number: 20150008437
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Yeon Taek JEONG, Bo Sung KIM, Doo-Hyoung LEE, June Whan CHOI, Tae-Young CHOI, Kano MASATAKA
  • Publication number: 20140377904
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Application
    Filed: September 4, 2014
    Publication date: December 25, 2014
    Inventors: DOO HYOUNG LEE, CHAN WOO YANG, SEUNG-HO JUNG, DOO NA KIM, BO SUNG KIM, EUN HYE PARK, JUNE WHAN CHOI
  • Patent number: 8895977
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 8871577
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: October 28, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon Taek Jeong, Bo Sung Kim, Doo-Hyoung Lee, June Whan Choi, Tae-Young Choi, Kano Masataka
  • Patent number: 8853687
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Chan Woo Yang, Seung-Ho Jung, Doo Na Kim, Bo Sung Kim, Eun Hye Park
  • Patent number: 8753920
    Abstract: Provided is a precursor composition for an oxide semiconductor. The precursor composition for the oxide semiconductor includes a metal complex compound formed by a metal ion and an organic ligand, wherein the precursor composition is represented by the following Formula 1. MAn ??(Formula 1) Herein, M is a metal ion, A is an organic ligand which includes ?-substituted carboxylate, and n is a natural number.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 17, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bo Sung Kim, Doo-Hyoung Lee, Yeon-Taek Jeong, Ki-Beom Lee, Young-Min Kim, Tae-Young Choi, Seon-Pil Jang, Kang-Moon Jo
  • Publication number: 20130328042
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Application
    Filed: November 16, 2012
    Publication date: December 12, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Doo Hyoung LEE, Chan Woo YANG, Seung-Ho JUNG, Doo Na KIM, Bo Sung KIM, Eun Hye PARK, June Whan CHOI
  • Publication number: 20130320327
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Application
    Filed: November 9, 2012
    Publication date: December 5, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung LEE, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Publication number: 20130237011
    Abstract: A method of manufacturing a thin-film transistor substrate includes: applying a composition on a substrate to form a thin-film on the substrate, heating the thin-film, and patterning the thin-film to form an oxide semiconductor pattern. The composition includes a metal nitrate and water. The potential of hydrogen (pH) of the composition is about 1 to about 4.
    Type: Application
    Filed: November 16, 2012
    Publication date: September 12, 2013
    Applicants: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeon-Taek JEONG, Bo-Sung KIM, Doo-Hyoung LEE, Seung-Ho JUNG, Tae-Young CHOI, Doo-Na KIM, Byeong-Soo BAE, Chan-Woo YANG, Byung-Ju LEE, Kang-Moon JO, Young-Hwan HWANG, Jun-Hyuck JEON