Patents by Inventor Dora Plus

Dora Plus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4760557
    Abstract: A memory cell circuit has a pair of cross-coupled inverters. One inverter has an output impedance at least 10 times, preferably, at least 50 times, that of the other inverter so that during a radiation pulse the chance of a change in logic state is reduced. In a particular embodiment, the one inverter has an output impedance of 135 times that of the other inverter.
    Type: Grant
    Filed: September 5, 1986
    Date of Patent: July 26, 1988
    Assignee: General Electric Company
    Inventors: Roger G. Stewart, Dora Plus
  • Patent number: 4758744
    Abstract: A decoder circuit for fully decoding N input variables includes 2.sup.N logic gates arranged into 2.sup.N-1 pairs of gates, with each gate having N inputs, and one output. The decoder also includes (N-1) inverters for producing the complements of N-1 of the N input variables whereby the (N-1) input variables and their complements are arranged into 2.sup.(N-1) different combinations of (N-1) signals for generating a different combination of (N-1) signals per pair of logic gates. (N-1) inputs of each of the two gates forming a pair of gates are interconnected to receive the same N-1 input signals forming one of the 2.sup.N-1 combinations. The Nth input variable is applied to the Nth input of one gate from each pair of gates and the output of the one gate from each pair is connected to the Nth input of the other gate with which it is paired.
    Type: Grant
    Filed: November 26, 1986
    Date of Patent: July 19, 1988
    Assignee: RCA Corporation
    Inventor: Dora Plus
  • Patent number: 4656373
    Abstract: An input signal translating circuit includes first and second transistors having their conduction paths connected in series between a first power terminal and an output node, and a third transistor whose conduction path is connected between the output node and a second power terminal. The circuit includes means for applying an input signal to the control electrodes of the first and third transistors for turning one on and the other off for one value of the input signal and turning the one off and the other on for another value of input signal. Means responsive to the signal produced at the output node generate a delayed negative feedback signal which is applied to the control electrode of the second transistor for turning-it-off after the voltage at said output node is at, close to, or greater than, the voltage applied to the first power terminal and for turning-it-on after the voltage at said output node is at, or close to, the voltage at the second power terminal.
    Type: Grant
    Filed: November 26, 1984
    Date of Patent: April 7, 1987
    Assignee: RCA Corporation
    Inventor: Dora Plus