Abstract: A method includes monitoring a request rate of speculative memory read requests from a penultimate-level cache to a main memory. The speculative memory read requests correspond to data read requests that missed in the penultimate-level cache. A hit rate of searches of a last-level cache for data requested by the data read requests is monitored. Core demand speculative memory read requests to the main memory are selectively enabled in parallel with searching of the last-level cache for data of a corresponding core demand data read request based on the request rate and the hit rate. Prefetch speculative memory read requests to the main memory are selectively enabled in parallel with searching of the last-level cache for data of a corresponding prefetch data read request based on the request rate and the hit rate.

Abstract: A method of monitoring, by one or more cores of a multi-core processor, speculative instructions, where the speculative instructions store data to a shared memory location, and where a semaphore, associated with the memory location, specifies the availability of the memory location to store data. One or more speculative instructions are flushed based on when the semaphore specifies the memory location is unavailable. Any further speculative instructions are suppressed from being issued based on a count of flushed speculation instructions above a specified threshold, executing the speculative instructions when the semaphore specifies the memory location is available, and storing the data to the memory location.

Abstract: A method includes monitoring a request rate of speculative memory read requests from a penultimate-level cache to a main memory. The speculative memory read requests correspond to data read requests that missed in the penultimate-level cache. A hit rate of searches of a last-level cache for data requested by the data read requests is monitored. Core demand speculative memory read requests to the main memory are selectively enabled in parallel with searching of the last-level cache for data of a corresponding core demand data read request based on the request rate and the hit rate. Prefetch speculative memory read requests to the main memory are selectively enabled in parallel with searching of the last-level cache for data of a corresponding prefetch data read request based on the request rate and the hit rate.

Abstract: A method for steering data for an I/O write operation includes, in response to receiving the I/O write operation, identifying, at an interconnect fabric, a cache of one of a plurality of compute complexes as a target cache for steering the data based on at least one of: a software-provided steering indicator, a steering configuration implemented at boot initialization, and coherency information for a cacheline associated with the data. The method further includes directing, via the interconnect fabric, the identified target cache to cache the data from the I/O write operation. The data is temporarily buffered at the interconnect fabric, and if the target cache attempts to fetch the data while the data is still buffered at the interconnect fabric, the interconnect fabric provides a copy of the buffered data in response to the fetch operation instead of initiating a memory access operation to obtain the data from memory.

Abstract: A system includes a multi-core processor that includes a scheduler. The multi-core processor communicates with a system memory and an operating system. The multi-core processor executes a first process and a second process. The system uses the scheduler to control a use of a memory bandwidth by the second process until a current use in a control cycle by the first process meets a first setpoint of use for the first process when the first setpoint is at or below a latency sensitive (LS) floor or a current use in the control cycle by the first process exceeds the LS floor when the first setpoint exceeds the LS floor.

Abstract: A method of monitoring, by one or more cores of a multi-core processor, speculative instructions, where the speculative instructions store data to a shared memory location, and where a semaphore, associated with the memory location, specifies the availability of the memory location to store data. One or more speculative instructions are flushed based on when the semaphore specifies the memory location is unavailable. Any further speculative instructions are suppressed from being issued based on a count of flushed speculation instructions above a specified threshold, executing the speculative instructions when the semaphore specifies the memory location is available, and storing the data to the memory location.

Abstract: Security key identifier remapping includes associating a system-level security key identifier to a local-level identifier requiring fewer bits of storage space. The remapped security key identifiers are used to receive, at a first compute complex of a processing system, a memory access request including a memory address value and a system-level security key identifier. The compute complex responds to the memory access request based on a determination of whether a security key identifier map of the first compute complex includes a mapping of the system-level security key identifier to a local-level security key identifier. In response to determining that the security key identifier map of the first compute complex does not include a mapping of the system-level security key identifier to the local-level security key identifier, a cache miss message may be returned without probing caches of the first compute complex.

Abstract: A method for steering data for an I/O write operation includes, in response to receiving the I/O write operation, identifying, at an interconnect fabric, a cache of one of a plurality of compute complexes as a target cache for steering the data based on at least one of: a software-provided steering indicator, a steering configuration implemented at boot initialization, and coherency information for a cacheline associated with the data. The method further includes directing, via the interconnect fabric, the identified target cache to cache the data from the I/O write operation. The data is temporarily buffered at the interconnect fabric, and if the target cache attempts to fetch the data while the data is still buffered at the interconnect fabric, the interconnect fabric provides a copy of the buffered data in response to the fetch operation instead of initiating a memory access operation to obtain the data from memory.

Abstract: A processing system suspends execution of a program thread based on an access latency required for a program thread to access memory. The processing system employs different memory modules having different memory technologies, located at different points in the processing system, and the like, or a combination thereof. The different memory modules therefore have different access latencies for memory transactions (e.g., memory reads and writes). When a program thread issues a memory transaction that results in an access to a memory module having a relatively long access latency (referred to as “slow” memory), the processor suspends execution of the program thread and releases processor resources used by the program thread. When the processor receives a response to the memory transaction from the memory module, the processor resumes execution of the suspended program thread.

Abstract: Thermal insulation structures include a polymer foam layer adhered to a non-cellular sheet of a polylactide resin. The polylactide resin is a surprisingly good barrier to the diffusion of atmospheric gases into and blowing agents out of the foam layer. Accordingly, the diffusion of atmospheric gases and the blowing agents is retarded substantially. This greatly reduces the loss of thermal insulation capacity of the structure due to the replacement of the blowing agent with atmospheric gases.

Abstract: Lactic acid equivalents are recovered from a starting lactide stream by catalytically racemizing a portion of the lactide in the stream at a temperature of 180° C. or below. This increases the proportion of two species of lactide (i.e., at least two of S,S-, R,R- or meso-lactide) at the expense of the third species. The racemized mixture so obtained can be separated to recover some or all of one or more of the lactide species from the remaining lactide species, by a process such as melt crystallization or distillation. Impurities in the starting lactide stream usually are retained mostly in the remaining meso-lactide, so a highly purified S,S- and/or R,R-lactide stream can be produced in this manner. Such a purified S,S- and R,R-lactide stream is suitable for polymerization to form a polylactide.

Abstract: Thermoformed PLA stereocomplex parts are made using a PLA stereocomplex composition having a highest crystallization melting temperature from 200 to 215° C. The stereocomplex composition preferably has less than 5 J/g of lower melting (160 to 190° C.) crystallites. The stereocomplex can be pre-annealed in various ways to reduce thermoforming cycle times. The stereocomplex forms parts with low haze and good thermal resistance, at reasonable cycle times.

Abstract: An S,S- and R,R-lactide stream suitable for polymerization is prepared by producing a low molecular weight poly(lactic acid), depolymerizing the low molecular weight poly(lactic acid) to form a mixture of S,S-, R,R- and meso-lactide, and separating meso-lactide from this mixture to form an S,S- and R,R-lactide stream. Meso-lactide is recycled into the process, and shifts the mole fractions of the lactides in the lactide mixture that is produced.

Abstract: Lactic acid equivalents are recovered from a starting lactide stream by catalytically racemizing a portion of the lactide in the stream at a temperature of 180° C. or below. This increases the proportion of two species of lactide (i.e., at least two of S,S-, R,R- or meso-lactide) at the expense of the third species. The racemized mixture so obtained can be separated to recover some or all of one or more of the lactide species from the remaining lactide species, by a process such as melt crystallization or distillation. Impurities in the starting lactide stream usually are retained mostly in the remaining meso-lactide, so a highly purified S,S- and/or R,R-lactide stream can be produced in this manner. Such a purified S,S- and R,R-lactide stream is suitable for polymerization to form a polylactide.

Abstract: Lactic acid equivalents are recovered from a starting lactide stream by catalytically racemizing a portion of the lactide in the stream at a temperature of 180° C. or below. This increases the proportion of two species of lactide (i.e., at least two of S,S-, R,R- or meso-lactide) at the expense of the third species. The racemized mixture so obtained can be separated to recover some or all of one or more of the lactide species from the remaining lactide species, by a process such as melt crystallization or distillation. Impurities in the starting lactide stream usually are retained mostly in the remaining meso-lactide, so a highly purified S,S- and/or R,R-lactide stream can be produced in this manner. Such a purified S,S- and R,R-lactide stream is suitable for polymerization to form a polylactide.

Abstract: Lactic acid equivalents are recovered from a starting lactide stream by catalytically racemizing a portion of the lactide in the stream at a temperature of 180° C. or below. This increases the proportion of two species of lactide (i.e., at least two of S,S-, R,R- or meso-lactide) at the expense of the third species. The racemized mixture so obtained can be separated to recover some or all of one or more of the lactide species from the remaining lactide species, by a process such as melt crystallization or distillation. Impurities in the starting lactide stream usually are retained mostly in the remaining meso-lactide, so a highly purified S,S- and/or R,R-lactide stream can be produced in this manner. Such a purified S,S- and R,R-lactide stream is suitable for polymerization to form a polylactide.

Abstract: An S, S- and R,R-lactide stream suitable for polymerization is prepared by producing a low molecular weight poly(lactic acid), depolymerizing the low molecular weight poly(lactic acid) to form a mixture of S, S-, R,R- and meso-lactide, and separating meso-lactide from this mixture to form an S, S- and R,R-lactide stream. Meso-lactide is recycled into the process, and shifts the mole fractions of the lactides in the lactide mixture that is produced.

Abstract: Thermoformed PLA stereocomplex parts are made using a PLA stereocomplex composition having a highest crystallization melting temperature from 200 to 215° C. The stereocomplex composition preferably has less than 5 J/g of lower melting (160 to 190° C.) crystallites. The stereocomplex can be pre-annealed in various ways to reduce thermoforming cycle times. The stereocomplex forms parts with low haze and good thermal resistance, at reasonable cycle times.

Abstract: A fibrous web having a first surface and a second surface. The fibrous web has a first region and at least one discrete second region, the second region being a discontinuity on the second surface and being a tuft comprising a plurality of tufted fibers extending from the first surface. The tufted fibers define a distal portion, the distal portion comprising portions of the tufted fibers being bonded together. Bonding can be thermal melt-bonding. In another embodiment the second surface of the web can have non-intersecting or substantially continuous bonded regions, which also can be thermal melt-bonding.

Abstract: An extensible apertured nonwoven web, and a method for making such an apertured nonwoven web. In one embodiment the method comprises the steps of providing an apertured nonwoven web, incrementally stretching it in a direction substantially parallel to the cross machine direction, and applying tension in the machine direction such that the web width after applying tension is less than the web width after incremental stretching.