Abstract: The invention provides a monolithic, highly integrated power supply circuit capable of providing various voltages for circuits on an expansion card, either from a main supply source or an auxiliary supply source. The monolithic power supply circuit preferably includes two switching converters, two low-drop-out regulators, a standby regulator, a reset circuit, and a control circuit. An associated method for providing various voltages via a monolithic power supply circuit is also disclosed.

Abstract: A switched-current oscillator having a dc current source adapted to charge a capacitor so that the capacitor charging time is controlled based on a sequence of (pseudo)randomly selected values, each of those values defining a corresponding charging time. A discharge device is adapted to discharge the capacitor if the voltage across the capacitor reaches a threshold voltage, at which point the next value in the sequence is selected to determine the next charging time. A square-wave clock signal having spread-spectrum characteristics is generated in the oscillator by using the series of charge-discharge cycles corresponding to the sequence of randomly selected values to toggle a flip-flop operating as a delay line and zero-order hold.

Abstract: A fault monitoring and management system integrates a fault controller with the power load functions within the power management device of a battery operated system. Multiple input load lines allow the fault controller to diagnose and disable defective or faulty power load functions that draw current from the system supply or battery. In addition, the fault monitor allows the system to stay operational if the fault is non-catastrophic to the critical functions.

Abstract: The present invention provides an LDO regulator having a greatly improved overshoot characteristic through the use of an output voltage based feedback loop. More specifically, in the invention, one or more resistors in the divider network in a conventional LDO regulator is replaced with a variable resistor. By varying the resistance of the variable resistor as a function of the output voltage of the LDO regulator, the closed-loop gain of the LDO amplifier may be modulated in such a way as to reduce overshoot in the output voltage of the LDO regulator. In particular, the targeted final output voltage value may be arbitrarily lowered for a predetermined period of time, so that the LDO regulator output may rapidly reach a steady state voltage that is very close to the final desired regulating value without exceeding the final desired regulating value during regulator startup.

Abstract: A switched-current oscillator having a dc current source adapted to charge a capacitor so that the capacitor charging time is controlled based on a sequence of (pseudo)randomly selected values, each of those values defining a corresponding charging time. A discharge device is adapted to discharge the capacitor if the voltage across the capacitor reaches a threshold voltage, at which point the next value in the sequence is selected to determine the next charging time. A square-wave clock signal having spread-spectrum characteristics is generated in the oscillator by using the series of charge-discharge cycles corresponding to the sequence of randomly selected values to toggle a flip-flop operating as a delay line and zero-order hold.

Abstract: Certain embodiments of the inventions provide an integrated circuit (IC) having a processor operatively coupled to a PVT (process-voltage-temperature) source and an adjustable memory. The processor receives from the source an input characterizing the present PVT condition and generates a command for the memory based on that input. In response to the command, the memory adjusts its internal circuit structure, clock speed, and/or operating voltage(s) to optimize its performance for the present PVT condition. Advantageously, the ability to adjust the memory so that it can maintain its functionality and deliver an acceptable level of performance under unfavorable PVT conditions provides additional flexibility in choosing circuit design options, which can produce area savings and/or increase the yield of acceptable ICs during manufacture.

Abstract: A method and apparatus for embedding over-limit voltage detector and recording mechanisms on the silica wafer of integrated circuits to detect, protect and record voltage overages of pre-set voltage limits is presented. A detector circuit and a recorder circuit are placed in series or in parallel on the electrical connections between the integrated circuit devices and the voltage pins connected to outside power sources. When a voltage source is connected and an over-voltage condition is detected, the detector circuit short-circuits the connection while the recorder circuit records the event for later investigation.

Abstract: The present invention implements a software controlled thermal feedback system for battery charging circuitry in portable devices, specifically in cellular telephones. The charging hardware block is integrated into a mixed-signal analog base-band (ABB) circuit. In addition to standard function controls, integrated within the ABB are silicon temperature sensors used to monitor the temperature of any silicon components integrated on the ABB and detect any temperature change due to thermal heating. The temperature value is passed to the digital base band (DBB) circuit. Here, a microcontroller is programmed to perform power management functions relating to the ABB. Thermal control software, implemented on the DBB microcontroller, monitors the silicon temperature of the ABB and adjusts the power levels on the ABB accordingly to provide a controlled chip temperature.

Abstract: A remote sensing power supply regulator uses high impedance sensing inputs coupled internally to at least one circuit element within an integrated circuit, so as to regulate the voltages produced by the power supply to a level that maintains nominal voltage levels at the internal circuit element within the very large scale integrated circuit. The sense point can be chosen to serve one or a group of on-board load elements that are operationally sensitive to voltage droop and/or ground bounce.

Abstract: An integrated circuit having two or more power domains that include load circuits in different portions of the integrated circuit is disclosed. In order to conserve power, the circuits in one of the power domains are shut down by disconnecting the power source serving that domain. The load circuits in each power domain are buffered from the load circuits in other power domains by buffer cells. The buffer cells reduce leakage currents in the power domain that is shut down, by restricting data signals from the “live” power domain from reaching the shut-down power domain, and further by providing predetermined voltage signals to the load circuits in the shut-down power domain that are selected to minimize leakage currents in the inactive load circuits. The invention further provides a corresponding method for reducing power consumption in an integrated circuit having at least two power domains separated by a buffer cell.

Abstract: The invention provides a switching converter comprising as few as two high-side switching transistors and a low-side rectifying device, along with a control circuit. The switching converter is capable of operating from a main supply source or an auxiliary supply source. The invention further includes a method for producing a regulated voltage from a first supply voltage and a second supply voltage via the two high-side switching transistors and a low-side rectifying device.

Abstract: A PCMCIA card is provided that includes an on-board (integrated) storage battery and, preferably, charging circuitry for same. The on-board storage battery is dedicated to operation of on-board devices that have higher current/power requirements than are available from the 5 volt pins of the PCMCIA card. For example, in a cellular device application, during high-load transmit periods, the battery is used to source the power amplifier, and during low-load periods, the battery can be charged by the on-board battery charging circuitry, preparing the battery for the next high current/power transmit burst. In a preferred embodiment, the battery comprises a very thin Li-Ion/polymer battery or equivalent.

Abstract: A dynamic low power reference circuit includes a reference source for generating a reference voltage and/or a reference current. The reference circuit further includes an activity detector configured to measure an activity level of at least a portion of another circuit coupled to the reference circuit and to generate a control signal representative of the activity level. A controller coupled to the reference source is configured to dynamically change an output impedance of the reference circuit in response to the control signal. The techniques of the present invention thus provide a reference circuit that is capable of dynamically changing an output impedance associated therewith, such that when activity on one or more nodes in the other circuit is detected within a time period, the output impedance of the reference circuit is at a first value which is sufficiently low so as to reduce the likelihood of noise being coupled onto the output of the reference circuit.

Abstract: A dynamic low power reference circuit includes a reference source for generating a reference voltage and/or a reference current. The reference circuit further includes an activity detector configured to measure an activity level of at least a portion of another circuit coupled to the reference circuit and to generate a control signal representative of the activity level. A controller coupled to the reference source is configured to dynamically change an output impedance of the reference circuit in response to the control signal. The techniques of the present invention thus provide a reference circuit that is capable of dynamically changing an output impedance associated therewith, such that when activity on one or more nodes in the other circuit is detected within a time period, the output impedance of the reference circuit is at a first value which is sufficiently low so as to reduce the likelihood of noise being coupled onto the output of the reference circuit.

Abstract: An amplifier, for use in regulator circuits and other applications, having dynamic input stage biasing includes an input stage operatively coupled to an input of the amplifier. A controlled current source coupled to the input stage is responsive to a control signal for at least partially controlling an input bias current generated by the controlled current source. The amplifier further includes a sense circuit operatively connected in a feedback arrangement between an output of the amplifier and the controlled current source. The sense circuit measures an output load current from the amplifier and generates the control signal in response thereto, whereby the input bias current is a function of the output load current of the amplifier. In this manner, parasitic poles associated with the amplifier are pushed out in frequency so as to provide superior amplifier stability while dissipating low quiescent current, particularly at low output load current levels.

Abstract: An amplifier, for use in regulator circuits and other applications, having dynamic input stage biasing includes an input stage operatively coupled to an input of the amplifier. A controlled current source coupled to the input stage is responsive to a control signal for at least partially controlling an input bias current generated by the controlled current source. The amplifier further includes a sense circuit operatively connected in a feedback arrangement between an output of the amplifier and the controlled current source. The sense circuit measures an output load current from the amplifier and generates the control signal in response thereto, whereby the input bias current is a function of the output load current of the amplifier. In this manner, parasitic poles associated with the amplifier are pushed out in frequency so as to provide superior amplifier stability while dissipating low quiescent current, particularly at low output load current levels.

Abstract: A baseband receiver particularly well-suited for wireless applications utilizes a dual-port DAC in a successive-approximation ADC, where the dual-port DAC replaces the separate pair of single port conventional DACs and is therefore shared by the I and Q down-converted components. The use of a dual-port DAC results in significant size and power savings over conventional arrangements.

Abstract: An integrated circuit includes a pulse generator for generating a pulse of a predetermined duration. A first switch, controlled by the pulse, drives current into a fuse link when the pulse takes on a first logic level. The first switch prevents flow of current into the fuse link when the pulse takes on a second logic level. A latch is coupled to the fuse link to sense a logic level developed during the pulse. The latch may be cleared by the leading edge of the pulse. The logic level developed at the fuse link due to the driven current is latched into the latch by the trailing edge of the pulse and is indicative of whether the fuse link was blown or not blown.

Abstract: There is disclosed an integrated circuit including a digital-to-analog converter in which a resistor string is adapted to be coupled to a reference source. The resistor string includes a plurality of serially coupled impedances defining intermediate taps at the junctions thereof. A first plurality of switches are coupled between a first output node and respective ones of the intermediate taps. A first selection circuit receives a first digitally coded signal and is coupled to each switch in the first plurality of switches. The first selection circuit selectively switches the first plurality of switches to predetermined states depending upon a first digitally coded signal provided thereto, to generate a first analog output. A second plurality of switches are coupled between a second output node and respective ones of the intermediate taps.

Abstract: A differential amplifier including a balanced differential amplifier circuit having common-mode feedback with input stage tail current servoing now includes a kickstart circuit that ensures that the circuit will always start up and operate in its intended operating region, thus eliminating any latch-up or dead zone problems.