Abstract: A compensated bias current circuit for use in an operational amplifier including a differential input stage, a gain stage, and an output driver stage. The compensated bias current circuit includes a PNP current mirror control transistor having an emitter coupled to a first supply voltage conductor, a collector coupled by a first conductor to a first terminal of a current source circuit, and a base connected to a second conductor, with the second conductor connected to first and second PNP current mirror output transistors in the gain stage and a third PNP current mirror output transistor in the output driver stage.

Abstract: The present invention teaches a variety of output stages, buffer circuits, and power amplifiers as well as methods for buffering electrical signals. According to one embodiment of the present invention, an output stage includes an input, an output, an error stage coupled between the input and the output and responsive to a difference between an input signal present on the input and an output signal present on the output, the error stage being operative to generate a current control signal related to the difference between the input signal and the output signal, a current mirror coupled to the error stage and responsive to the current control signal to generate a demand driven current signal related to a magnitude of the current control signal, and an amplification stage coupled between the input and the output.

Abstract: In accordance with the objectives of the present invention, a variety of apparatus and methods for amplifying an electrical signal are disclosed. According to one embodiment of the present invention, a dual-output stage amplifier includes an amplifier stage having an input and an output, a first output stage having an input and an output, a second output stage having an input and an output and an error stage having an input and an output. The first output stage output is coupled with the output of the amplifier stage and responsive to the amplifier stage. If the first output stage output is coupled to an output load, the first output stage is capable of providing an output current to the output load such that a first output voltage related to an input voltage at the input of the amplifier stage is maintained across the output load. In turn, the second output stage input is coupled with the output of the amplifier stage and in parallel with the first output stage.

Abstract: A three-way double stopcock and associated tubing is disclosed with which to connect both a cardioplegia solution source and a pressure monitor for the solution selectively and alternatively to either an antegrade cardioplegia catheter or a retrograde cardioplegia catheter. The stopcock includes a hollow valve body with three solution infusion ports communicating to the interior thereof in a coplanar arrangement at a first longitudinal point on the valve body. Three cardioplegia pressure monitoring ports also communicate through the valve body to the interior thereof at a second longitudinal position distinct from the first. Mounted in the valve body is a cylindrical valve core selectively rotatable about the longitudinal axis thereof between a first position in which the cardioplegia solution source and the pressure monitor are coupled to the antegrade cannula and a second position in which the cardioplegia solution source and the pressure monitor are coupled to the retrograde catheter.