Patents by Inventor Duc Pham

Duc Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7994837
    Abstract: A phase interpolator circuit can include first and second transistors coupled to form a differential pair, first and second load circuits, a first switch circuit coupled between the first transistor and the first load circuit, a second switch circuit coupled between the second transistor and the second load circuit, a current source circuit, and a third switch circuit coupled between the differential pair and the current source circuit. A phase interpolator circuit can include three differential pairs of transistors. Six periodic input signals having six different phases are concurrently provided to control inputs of transistors in the three differential pairs of transistors. The phase interpolator circuit generates a selected phase in an output signal in response to four of the periodic input signals.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: August 9, 2011
    Assignee: Altera Corporation
    Inventors: Vinh Van Ho, Tien Duc Pham, Tim Tri Hoang
  • Publication number: 20110185218
    Abstract: A method, system, and computer program product are provided for adjusting write timing in a memory device based on a training signal. For instance, the method can include configuring the memory device in a training mode of operation. The method can also include determining a write timing window between a signal on a data bus and a write clock signal based on the training signal. Further, the method includes adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference.
    Type: Application
    Filed: July 30, 2010
    Publication date: July 28, 2011
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Aaron John Nygren, Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger
  • Publication number: 20110185256
    Abstract: A method, system, and computer program product are provided for adjusting write timing in a memory device based on results of an error detection function. For instance, the method can include determining a write timing window between a signal on a data bus and a write clock signal based on the results of the error detection function. The method can also include adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference.
    Type: Application
    Filed: July 30, 2010
    Publication date: July 28, 2011
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Aaron John Nygren, Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger
  • Patent number: 7960266
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: June 14, 2011
    Assignee: SanDisk Corporation
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Publication number: 20110019787
    Abstract: Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin is provided on a first IC. The first IC configures a second IC to change a pin assignment, so that the second IC interprets a signal sent on the timing pin by the first IC and received on the reassigned pin as a request to transmit a return signal. The return signal is received on the timing pin. The return signal is used to determine whether timing should be adjusted by the first IC. In an embodiment a clock and data recover (CDR) circuit compares the signal sent to the signal received in order to make the determination. In an embodiment the first IC is a processor-based device, and the second IC is a memory device controlled by the first device.
    Type: Application
    Filed: July 24, 2009
    Publication date: January 27, 2011
    Inventors: Aaron Nygren, Ming-Ju Edward Lee, Shadi Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger, Michael Litt
  • Publication number: 20100329045
    Abstract: A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 30, 2010
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Ming-Ju Edward LEE, Shadi M. Barakat, Warren Fritz Kruger, Xiaoling Xu, Toan Duc Pham, Aaron John Nygren
  • Patent number: 7808902
    Abstract: Systems and methods for measuring the performance of a scalable network are disclosed. In one embodiment, a system configured in accordance with this disclosure may comprise a packet generator for providing test packets to a network under test; and a packet count unit for counting test packet received from the network under test. The system may be configured to test networks of various bandwidths such as OC-3 and OC-12 level networks.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: October 5, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Pham, Duc Pham, Chinh Phan
  • Publication number: 20100240182
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Application
    Filed: June 1, 2010
    Publication date: September 23, 2010
    Applicant: SanDisk Corporation
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Patent number: 7773403
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Grant
    Filed: January 15, 2007
    Date of Patent: August 10, 2010
    Assignee: SanDisk Corporation
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Patent number: 7592225
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Grant
    Filed: January 15, 2007
    Date of Patent: September 22, 2009
    Assignee: SanDisk Corporation
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Patent number: 7565532
    Abstract: A data server platform includes a security file system layer interposed between the platform operating system kernel and file system. The secure file system layer is structured to implement a file access control function that selectively constrains data transfer operations initiated through the operating system kernel by an application program to transfer file data through the file system with respect to a persistent data store. A file access controller, implemented independent of the operating system kernel, is coupled to the security file system layer and supports the file access control function by defining permitted file data transfers through the file system. Management of the file access controller separate from the data server platform ensures that any security breach of the platform operating system kernel cannot compromise the function of the security file system layer.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: July 21, 2009
    Assignee: Vormetric, Inc.
    Inventors: Duc Pham, Tien Le Nguyen, Pu Paul Zhang, Mingchen Lo
  • Patent number: 7436208
    Abstract: A carry circuit having a power-save mode and a method for reducing power consumption of an integrated circuit are described. A power-save input is selected for control select signaling. A voltage level input is selected as an initial carry input. The initial carry input is propagated through a carry stage responsive to the carry input and the control select signaling. The carry stage is placed in a first non-switching steady state mode responsive to the propagating of the initial carry input through the carry stage.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: October 14, 2008
    Assignee: Xilinx, Inc.
    Inventor: Tien Duc Pham
  • Publication number: 20080171428
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Application
    Filed: January 15, 2007
    Publication date: July 17, 2008
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Publication number: 20080169567
    Abstract: High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
    Type: Application
    Filed: January 15, 2007
    Publication date: July 17, 2008
    Inventors: James Kai, George Matamis, Tuan Duc Pham, Masaaki Higashitani, Takashi Orimoto
  • Publication number: 20080052755
    Abstract: A security server qualifies the execution of programs for networked host computer systems using a database storing pre-qualified program signatures and defined policy rules associating execution permission qualifiers with execution control values. The server executes a control program in response to execution requests received via a communications network interface from identifiable hosts, wherein a predetermined execution request received from a predetermined host computer system includes an identification of a program load request, request context related data, and a secure program signature. The control program determines an execution control value based on an evaluation of the execution request relative to the pre-qualified program signatures and defined policy rules. The execution control value is then returned to the predetermined host computer system to securely qualify the execution of the program identified from the program load request.
    Type: Application
    Filed: February 28, 2007
    Publication date: February 28, 2008
    Inventors: Duc Pham, Tien Nguyen, Pu Zhang, Mingchen Lo
  • Patent number: 7334124
    Abstract: Network data files are secure through the operation of an infrastructure gateway-based network file access appliance. Network file data, corresponding to network pocket payload data, are further reduced to a sequence of data blocks that are secured through any combination of block encryption, compression, and digital signatures. File meta-data, including encryption, compression and block-level digital signatures are persistently stored with the file data, either in-band in the file as stored or out-of-band key as a separately stored file or file policy record. File meta-data is recovered with accesses of the file data to support bidirectional encryption and compression and to detect tampering with the file data by comparison against block-level digital signatures.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: February 19, 2008
    Assignee: Vormetric, Inc.
    Inventors: Duc Pham, Tien Le Nguyen, Pu Paul Zhang, Mingchen Lo
  • Patent number: 7283538
    Abstract: A network gateway processor architecture including a scalable array of compute processors that function to convert inbound data packets to outbound data packets, an ingress processor coupleable to a first network to receive the inbound data packets and coupled to provide the inbound data packets to the compute processors, and an egress processor coupleable to a second network and coupled to the compute processors to collect and forward the outbound data packets to the second network. The ingress processor distributes inbound data packets to the compute processors based on a least load value selected from current load values determined for the respective compute processors of the scalable array. The current load values represent estimated processing completion times for the respective compute processors of the scalable array of compute processors.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: October 16, 2007
    Assignee: Vormetric, Inc.
    Inventors: Duc Pham, Nam Pham, Tien Le Nguyen
  • Publication number: 20070174362
    Abstract: On an archive server, a secure storage control layer is interposed in the archive data stream between an archiving application and a storage device driver. The secure storage control layer includes an encryption engine providing for two-level cipher processing of data segments transported by the stream. A secure policy controller is coupled to the secure storage control layer and, responsive to identifying information obtained from the stream, retrieves a group of encryption keys from a secure storage repository to enable the encryption engine to selectively encrypt data segments or a single encryption key conditionally enabling the encryption engine to decrypt select data segments. For both encryption and decryption, the integrity of the stream is maintained allowing operation of the secure storage control layer to be functionally transparent to the archiving application and storage device driver.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 26, 2007
    Inventors: Duc Pham, Tien Nguyen
  • Publication number: 20070050620
    Abstract: A data server platform includes a security file system layer interposed between the platform operating system kernel and file system. The secure file system layer is structured to implement a file access control function that selectively constrains data transfer operations initiated through the operating system kernel by an application program to transfer file data through the file system with respect to a persistent data store. A file access controller, implemented independent of the operating system kernel, is coupled to the security file system layer and supports the file access control function by defining permitted file data transfers through the file system. Management of the file access controller separate from the data server platform ensures that any security breach of the platform operating system kernel cannot compromise the function of the security file system layer.
    Type: Application
    Filed: October 23, 2006
    Publication date: March 1, 2007
    Inventors: Duc Pham, Tien Nguyen, Pu Zhang, Mingchen Lo
  • Patent number: RE41030
    Abstract: A server appliance self-adaptively configures to the operating parameters of a communications network to enable remote configuration control exclusively via the communications network. The server appliance includes a host computer system including a network interface controller and an operating system, executable by the host computer system, that is configurable by a defined set of network values for transmitting and receiving data packets through the network interface controller without network configuration conflicts. A control program, executable by the host computer system in conjunction with the operating system, determines, on initial start-up and specifically with respect to the communications network, an initial set of network values to configure the operating system.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: December 1, 2009
    Assignee: Avaya, Inc.
    Inventors: Duc Pham, Nom Pham, Tien Le Nguyen