Patents by Inventor Dustin Dale Forman
Dustin Dale Forman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11606100Abstract: Described herein is an apparatus and method for enhancing the dynamic range of an analog-to-digital converter (ADC). In one embodiment of the present approach, an analog input signal is amplified in a programmable gain amplifier (PGA) before the ADC receives the signal, so that the gain applied to an input signal, and gain (or attenuation) later applied in order to balance the overall gain of the circuit, occurs only in either the analog domain; in the prior art, gain occurs partly in each domain. The ADC gain is then adjusted to compensate for gain of the PGA and balance the overall gain of the circuit. In another embodiment, the ADC gain is adjusted, and gain of a digital gain element that receives the signal from the ADC is adjusted to compensate for the ADC gain and balance the overall gain of the circuit, eliminating the need for a PGA.Type: GrantFiled: October 25, 2021Date of Patent: March 14, 2023Assignee: ESS Technology, Inc.Inventors: Yongsheng Xu, Dustin Dale Forman
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Patent number: 11569839Abstract: Described herein is a method and apparatus for enhancing the dynamic range of a digital-to-analog conversion circuit. Dynamic range enhancement (DRE) is accomplished by modifying the gain of components of the circuit so that the gain of components generating noise is effectively reduced. In a circuit utilizing a plurality of 1-bit DACs, analog signal gain is decreased when the full nominal gain of the analog portion of the circuit is not needed to obtain a desired peak output amplitude. The reduction is accomplished by effectively “disconnecting” some of the plurality of 1-bit DACs. Some or all of the 1-bit DACs are configured to have a third or “tri-state” in which there is no connection to the normal two reference levels thus providing no output. If some portion of the 1-bit DACs is placed in the tri-state, both the signal and noise gain will be reduced.Type: GrantFiled: November 12, 2021Date of Patent: January 31, 2023Assignee: ESS Technology, Inc.Inventor: Dustin Dale Forman
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Publication number: 20210330279Abstract: An improved method and apparatus for detecting and measuring one or more biometric parameters of a user using a computing device in conjunction with an electroacoustic (audio) transducer is described. A first mode in which the audio transducer produces sound is disabled, and the device is placed in a second mode of operation in which a biometric signal is recovered from the transducer using a “back” audio signal. The biometric signal may then be measured or analyzed. The first mode is disabled by temporarily creating a high impedance between circuitry producing the audio signal and the transducer, while the biometric parameter is measured. This allows for detection of the biometric event without the need for significant additional components or circuitry. The computing device may most conveniently be a smartphone, but the approach described herein may also be easily and usefully applied to tablets, laptop or desktop computers or other devices.Type: ApplicationFiled: April 27, 2021Publication date: October 28, 2021Inventors: Dustin Dale Forman, Christian Leth Petersen, A. Martin Mallinson
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Publication number: 20170111743Abstract: An apparatus and method is disclosed for achieving improved sound quality from mobile ‘hifi’ playback devices by driving compatible headphones in ‘balanced’ or ‘differential’ mode via standard size headphone connectors on the device, while retaining full compliance with legacy jack connections and conventional headphones. When a headphone is connected, a smartphone may determine whether the headphone is one capable of accepting balanced audio signals, or one that uses a conventional 3-pole jack or a 4-pole CTIA or OMTP jack. For a headphone that accepts balanced audio signals, the four poles of a 4-pole jack are used to drive left and right audio channels, and inverted left and right audio channels. For conventional 3-pole or 4-pole jacks, switches in the smartphone adapt the audio output signals to the configuration expected by the headphone.Type: ApplicationFiled: September 10, 2016Publication date: April 20, 2017Inventors: Peter John Frith, Frederic Schrive, Hwang Soo Son, Dustin Dale Forman
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Publication number: 20170111742Abstract: An apparatus and method is disclosed for achieving improved sound quality from mobile ‘hifi’ playback devices by driving compatible headphones in ‘balanced’ or ‘differential’ mode via standard size headphone connectors on the device, while retaining full compliance with legacy jack connections and conventional headphones. When a headphone is connected, a smartphone may determine whether the headphone is one capable of accepting balanced audio signals, or one that uses a conventional 3-pole jack or a 4-pole CTIA or OMTP jack. For a headphone that accepts balanced audio signals, the four poles of a 4-pole jack are used to drive left and right audio channels, and inverted left and right audio channels. For conventional 3-pole or 4-pole jacks, switches in the smartphone adapt the audio output signals to the configuration expected by the headphone.Type: ApplicationFiled: September 10, 2016Publication date: April 20, 2017Inventors: Dustin Dale Forman, Peter John Frith, Frederic Schrive, Hwang Soo Son
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Patent number: 9462368Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.Type: GrantFiled: October 22, 2015Date of Patent: October 4, 2016Assignee: ESS Technology, Inc.Inventors: A. Martin Mallinson, Dustin Dale Forman, Robert Lynn Blair, Peter John Frith
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Publication number: 20160119710Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.Type: ApplicationFiled: October 22, 2015Publication date: April 28, 2016Inventors: A. Martin Mallinson, Dustin Dale Forman, Robert Lynn Blair, Peter John Frith
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Patent number: 9065384Abstract: A system and method is disclosed for selecting between two electronic signals, one of high quality, such as music audio, and the other of low quality, such as telephone call audio, in a smart phone, tablet or other device. In one embodiment, when the low quality signal is to be used this is accomplished by disabling the amplifier output to disconnect the high quality audio signal from the output port, rather than by means of a switch between the amplifier and the output port as in the prior art. This eliminates degradation of the signal due to the switch when the high quality signal is to be used. The amplifier typically has an associated feedback resistor network, and this may also be disconnected by means of a switch when the low quality signal is to be used, thus preventing distortion of the low quality signal due to the feedback network being a parallel load to the output port.Type: GrantFiled: September 10, 2014Date of Patent: June 23, 2015Assignee: ESS Technology, Inc.Inventors: Robert L. Blair, Hu Jing Yao, Dustin Dale Forman, A. Martin Mallinson
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Patent number: 8994422Abstract: A method and system is disclosed in which the phase detector in a phase-locked loop is able to run at the fastest speed appropriate for a reference signal. A frequency offset is added to the output frequency of the phase-locked loop, to alter the frequency fed to the frequency divider which would receive the output frequency in a conventional PLL to an intermediate frequency. The frequency offset is selected so that the ratio of the intermediate frequency to the reference frequency is a simple fraction, and preferably an integer, i.e., the intermediate frequency is a multiple of the reference frequency. In cases where the relationship between the output frequency and the reference frequency is largely relatively prime, the phase detector is thus able to receive signals at the frequency of the reference signal and operate at the fastest speed appropriate for the reference signal.Type: GrantFiled: October 16, 2013Date of Patent: March 31, 2015Assignee: ESS Technology, Inc.Inventors: Hu Jing Yao, Dustin Dale Forman, A. Martin Mallinson
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Patent number: 8773197Abstract: The present application describes an apparatus and method for reducing distortion in a class-D amplifier. The power output section of the amplifier is driven by an adjusted PWM signal, rather than by a PWM signal created directly from the input analog signal. A reference output, designed to closely track the input analog signal, is compared to the amplifier output. The resulting difference is an error signal which is inverted and summed with a second analog signal corresponding to the directly created PWM signal and changes the timing of the voltage transitions of the second analog signal. The changed voltage transitions are used to create the adjusted PWM signal. The inversion of the error signal causes negative feedback which results in the adjustment of the PWM signal being in a direction which reduces the error signal and thus the distortion of the amplifier.Type: GrantFiled: November 21, 2012Date of Patent: July 8, 2014Assignee: ESS Technology, Inc.Inventors: Dustin Dale Forman, Trevor Blake Lynch-Staunton, Montana T. C. Reid
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Publication number: 20140103977Abstract: A method and system is disclosed in which the phase detector in a phase-locked loop is able to run at the fastest speed appropriate for a reference signal. A frequency offset is added, to the output frequency of the phase-locked loop, to alter the frequency fed to the frequency divider which would receive the output frequency in a conventional PLL to an intermediate frequency. The frequency offset is selected so that the ratio of the intermediate frequency to the reference frequency is a simple fraction, and preferably an integer, i.e., the intermediate frequency is a multiple of the reference frequency. In cases where the relationship between the output frequency and the reference frequency is largely relatively prime, the phase detector is thus able to receive signals at the frequency of the reference signal and operate at the fastest speed appropriate for the reference signal.Type: ApplicationFiled: October 16, 2013Publication date: April 17, 2014Applicant: ESS Technology, Inc.Inventors: Hu Jing Yao, Dustin Dale Forman, A. Martin Mallinson
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Patent number: 8698660Abstract: The present application describes an apparatus and method for improving the performance of ?? modulators functioning as ADCs. In one embodiment, the ?? modulator comprises a plurality of quantizers operating in a round-robin fashion, rather than the single quantizer of the prior art. The use of multiple quantizers allows the ?? modulator to appear to be functioning at a significantly higher rate than a single quantizer allows. In another embodiment, a second-order ?? modulator contains a plurality of control loops, rather than the single control loop of the prior art. The use of multiple control loops allows the ?? modulator to have multiple points of maximum signal-to-noise ratio rather than a single such point as in prior art ?? modulators.Type: GrantFiled: October 31, 2012Date of Patent: April 15, 2014Assignee: ESS Technology, Inc.Inventors: A. Martin Mallinson, Dustin Dale Forman
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Patent number: 8693972Abstract: A method and system is disclosed for designing a radio for down-converting RF signals to IF signals by sampling the signals in a round-robin sampling circuit and multiplying the samples by coefficients that are changed at a fixed rate equal to the rate of operation of each of the sampling circuits. The circuit is able to down-convert multiple channels simultaneously to adjacent positions in the IF band, while rejecting unwanted image signals. The method and system avoids the difficulty and cost of directly digitizing the RF signal, allowing each component to operate at a greatly reduced speed. The coefficients are selected to provide the desired transfer function while keeping the output signal centered at a desired frequency.Type: GrantFiled: November 3, 2012Date of Patent: April 8, 2014Assignee: ESS Technology, Inc.Inventors: Dustin Dale Forman, A. Martin Mallinson, Robert Lynn Blair
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Publication number: 20130241647Abstract: The present application describes an apparatus and method for reducing distortion in a class-D amplifier. The power output section of the amplifier is driven by an adjusted PWM signal, rather than by a PWM signal created directly from the input analog signal. A reference output, designed to closely track the input analog signal, is compared to the amplifier output. The resulting difference is an error signal which is inverted and summed with a second analog signal corresponding to the directly created PWM signal and changes the timing of the voltage transitions of the second analog signal. The changed voltage transitions are used to create the adjusted PWM signal. The inversion of the error signal causes negative feedback which results in the adjustment of the PWM signal being in a direction which reduces the error signal and thus the distortion of the amplifier.Type: ApplicationFiled: November 21, 2012Publication date: September 19, 2013Applicant: ESS TECHNOLOGY, INC.Inventors: Dustin Dale Forman, Trevor Blake Lynch-Staunton, Montana T.C. Reid