Patents by Inventor Dustin Forman
Dustin Forman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9940415Abstract: A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.Type: GrantFiled: February 9, 2016Date of Patent: April 10, 2018Assignee: ESS Technology, Inc.Inventors: A. Martin Mallinson, Hu Jing Yao, Dustin Forman
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Publication number: 20160154914Abstract: A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.Type: ApplicationFiled: February 9, 2016Publication date: June 2, 2016Inventors: A. Martin Mallinson, Hu Jing Yao, Dustin Forman
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Patent number: 9287851Abstract: A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.Type: GrantFiled: March 7, 2012Date of Patent: March 15, 2016Assignee: ESS Technology, Inc.Inventors: A. Martin Mallinson, Hu Jing Yao, Dustin Forman
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Patent number: 8774749Abstract: A virtual Weaver architecture filter is implemented using a sampling mixer that successively processes samples of the input signal in round-robin fashion and provides a sum of the samples as multiplied by coefficients emulating quadrature sinusoidal waveforms. A virtual rather than actual local oscillator is reliably implemented without mismatch. Filtering between the Weaver mixers is eliminated in favor of filtering at the sampling input and effective time division multiplexing is achieved by selecting between resistor combinations that implement different scaling coefficients, resulting in an efficient analog implementation of a virtual Weaver architecture.Type: GrantFiled: December 11, 2009Date of Patent: July 8, 2014Assignee: ESS Technology, Inc.Inventors: Martin Mallinson, Dustin Forman
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Publication number: 20120300888Abstract: A virtual Weaver architecture filter is implemented using a sampling mixer that successively processes samples of the input signal in round-robin fashion and provides a sum of the samples as multiplied by coefficients emulating quadrature sinusoidal waveforms. A virtual rather than actual local oscillator is reliably implemented without mismatch. Filtering between the Weaver mixers is eliminated in favour of filtering at the sampling input and effective time division multiplexing is achieved by selecting between resistor combinations that implement different scaling coefficients, resulting in an efficient analog implementation of a virtual Weaver architecture.Type: ApplicationFiled: December 11, 2009Publication date: November 29, 2012Applicant: ESS TECHNOLOGY, INCInventors: Martin Mallinson, Dustin Forman
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Publication number: 20120245901Abstract: A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.Type: ApplicationFiled: March 7, 2012Publication date: September 27, 2012Applicant: ESS Technology, Inc.Inventors: A. Martin Mallinson, Hu Jing Yao, Dustin Forman
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Patent number: 7782129Abstract: A system is provided for use in an audio signal processor to reduce the order of the loop to remove sound artifacts from an audio signal that includes an input for receiving an audio input signal a control loop of order greater than one configured to process the audio input signal and to output a Pulse Width Modulated audio output signal, a circuit for performing a gradual reduction of the order of the control loop such that prior to entering a shut down state the order is reduced to a single order and a circuit to disconnect a Driver Circuit from the Pulse Width modulated signal operated by a timing device designed to switch at the moment of zero average output value.Type: GrantFiled: June 30, 2006Date of Patent: August 24, 2010Assignee: ESS Technology, Inc.Inventors: Andrew Martin Mallinson, Dustin Forman
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Publication number: 20080068234Abstract: Various embodiments perform sample rate conversion of a sample series at an input rate to an output rate. A version of the sample series is corrected with timing error information generated by a digital loop. The digital loop is locked to a first rate and clocked at a second rate.Type: ApplicationFiled: November 28, 2007Publication date: March 20, 2008Applicant: ESS Technology, Inc.Inventors: Dustin Forman, Andrew Mallinson
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Patent number: 7330138Abstract: A circuit is provided to correct a sample rate by way of time domain interpolation having a first circuit loop having an up/down counter configured to receive an input signal and a feedback signal and an adder configured to receive the output signal from the up/down counter and to output a carry output as the feedback signal to the up/down counter and a second circuit loop configured to transmit a sum output from the adder to a modulator and to feed back an output signal from the modulator to an input of the adder.Type: GrantFiled: June 30, 2006Date of Patent: February 12, 2008Assignee: ESS Technology, Inc.Inventors: Andrew Martin Mallinson, Dustin Forman
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Publication number: 20080005214Abstract: A system is provided for use in an audio signal processor to reduce the order of the loop to remove sound artifacts from an audio signal that includes an input for receiving an audio input signal a control loop of order greater than one configured to process the audio input signal and to output a Pulse Width Modulated audio output signal, a circuit for performing a gradual reduction of the order of the control loop such that prior to entering a shut down state the order is reduced to a single order and a circuit to disconnect a Driver Circuit from the Pulse Width modulated signal operated by a timing device designed to switch at the moment of zero average output value.Type: ApplicationFiled: June 30, 2006Publication date: January 3, 2008Applicant: ESS Technology, Inc.Inventors: Andrew Martin Mallinson, Dustin Forman
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Publication number: 20080005216Abstract: The invention has been described in the context of a system and method of removing artifacts from an audio signal during shutdown of the output. The system includes a means by which the average value may be found to be zero or sufficiently close to zero as determined by the resolution of the filter output and a means by which the filter average value being zero or close to zero is used to disconnect (or equivalently change impedance or power) of the device or devices rendering the PWM signal into the analog domain as may be implemented by a Class D bridge chip and disconnection means. The invention further includes a means by which channels are in succession compared to prior channels and switched to share the fixed output signal and a means by which upon finding the last channel is at the zero average value in synchrony with the prior channel or channels the output of the entire group of channels may be simultaneously disconnected.Type: ApplicationFiled: June 30, 2006Publication date: January 3, 2008Applicant: ESS Technology, Inc.Inventors: Andrew Martin Mallinson, Dustin Forman
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Publication number: 20080005215Abstract: The invention has been described in the context of a system and method of removing artifacts from an audio signal during shutdown of the output. The system includes a means by which the average value may be found to be zero or sufficiently close to zero as determined by the resolution of the filter output and a means by which the filter average value being zero or close to zero is used to disconnect (or equivalently change impedance or power) of the device or devices rendering the PWM signal into the analog domain as may be implemented by a Class D bridge chip and disconnection means.Type: ApplicationFiled: June 30, 2006Publication date: January 3, 2008Applicant: ESS Technology, Inc.Inventors: Andrew Martin Mallinson, Dustin Forman
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Publication number: 20070090976Abstract: The present invention relates to multi-bit to pulse width modulated signal conversion, with extensions to digital-to-analog conversion. In particular, it has application to conversion of pulse code modulated signals, such as used in CDs and DVDs, to audio output.Type: ApplicationFiled: October 2, 2006Publication date: April 26, 2007Applicant: ESS TECHNOLOGY, INC.Inventors: Dustin Forman, A. Mallinson, Simon Damphousse
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Publication number: 20070083277Abstract: The present invention relates to digital-to-analog conversion. In particular, it has application to conversion of pulse code modulated signals, such as used in CDs and DVDs, to a pulse width modulated or analog signal.Type: ApplicationFiled: September 26, 2005Publication date: April 12, 2007Applicant: ESS TECHNOLOGY, INC.Inventors: A. Mallinson, Dustin Forman, Simon Damphousse
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Publication number: 20070046514Abstract: A circuit is provided to correct a sample rate by way of time domain interpolation having a first circuit loop having an up/down counter configured to receive an input signal and a feedback signal and an adder configured to receive the output signal from the up/down counter and to output a carry output as the feedback signal to the up/down counter and a second circuit loop configured to transmit a sum output from the adder to a modulator and to feed back an output signal from the modulator to an input of the adder.Type: ApplicationFiled: June 30, 2006Publication date: March 1, 2007Applicant: ESS Technology, Inc.Inventors: Andrew Mallinson, Dustin Forman
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Publication number: 20060233393Abstract: A system and corresponding method is provided for digitally controlling the volume of an audio signal having a series of arithmetic units configured with combinatorial logic to operate in response to control signals to produce a digital output signal amplified in a predetermined manner to digitally control the volume.Type: ApplicationFiled: September 28, 2005Publication date: October 19, 2006Applicant: ESS Technology, Inc.Inventors: Simon Damphousse, Dustin Forman
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Publication number: 20060176031Abstract: A system and method of operation of a power switching circuit is provided that includes a charging switch configured to be connected to an inductor at one node and configured to receive control signals to open and close the charging switch. The circuit further includes a first channel coupled to the one node with a first channel switch, configured to supply a first channel voltage, configured to operate in one of buck mode and boost mode and configured to receive control signals to open and close the first channel switch; and a second channel coupled to the one node with a second channel switch, configured to supply a second channel voltage, configured to operate in one of buck mode and boost mode and configured to receive control signals to open and close the first channel switch.Type: ApplicationFiled: September 29, 2005Publication date: August 10, 2006Applicant: ESS Technology, Inc.Inventors: Dustin Forman, Andrew Mallinson