Abstract: A high value resistive device in an integrated circuit is disclosed, including a pair of substantially similar resistor segments each having an elongated semiconductor channel of e.g. silicon, lightly doped as would be appropriate for a low-threshold depletion mode FET. Disposed above the channel is an insulator layer, which is preferably much thicker than a typical gate insulator thickness. A shielding conductor is disposed generally overlaying the channel, connected to and extending from one end of the channel nearly to the other end of the channel. With the overlaying conductor connected to a first end of each segment, the plurality of segments are coupled in series, having first ends coupled together or second ends coupled together. A plurality or multiplicity of such segment pairs may be coupled in series to reduce nonlinearities at increased voltage levels.