Abstract: A method and apparatus for generating a wide instruction controlling at least one data processing resource, local to that data processing resource, by accessing a local wide instruction memory based upon a narrow instruction, to generate at least part of the wide instruction. The local wide instruction memory can be accessed on every instruction cycle to reconfigure the controlled data processing resource(s). The data processing resources preferably includes arithmetic resources acting on the logarithms of various data inputs to generate a spectrum of non-additive results. A preferred embodiment permits the narrow instruction to include a designator field, a first narrow field and a second narrow field. The designator field is used by the local wide instruction memories to select which of the first and second narrow fields to use in accessing the memory for controls of a specific resource. Use in a graphics shader with four datapath columns is shown.

Abstract: The invention includes apparatus and methods for high-speed calculation of non-linear functions based upon a shifted adder and a offset generator. Various implementations may preferably include a input preprocessor and/or an output post processor. The invention includes a family of core cells built from instances of these calculators providing an upward, functionally compatible, extension to a family of Application Specific Integrated Circuit (ASIC) core cells. All of these core cells consistently provide the ability to perform high speed DSP tasks including Fast Fourier Transforms (FFTs), Finite Impulse Response (FIR) filters and Infinite Impulse Response (IIR) filters. The core cells built from the calculators can concurrently perform many non-linear function calculations. The core cells can switch between tasks every clock cycle.

Abstract: A micro-diverse directional transmitting antenna array positioned proximately upon the boundary of a convex shape whereby the primary attenuation lobes of neighboring antennae overlap. Distinct transmissions by distinct directional antenna components utilize the same channel resources using transmitting directional antenna components that are not adjacent. Further, a micro-diverse directional antenna array comprising both transmitting and receiving directional antenna components positioned proximately upon the boundary of a convex shape whereby the primary attenuation lobes of nearest neighbor transmitting directional antenna components overlap and the primary attenuation lobes of nearest neighbor receiving directional antenna components overlap.

Abstract: A micro-diverse directional antenna array positioned proximately upon the boundary of a convex shape whereby the primary attenuation lobes of neighboring antennae overlap. This creates a situation in which the reception of signals by said array from the space-time-delay domain of transmission can be effectively modeled as a banded linear transformation upon discretized space-time-delay domain of transmission yielding the antenna reception at discrete time steps.

Abstract: A non-volatile memory access protocol that facilitates concurrent accessing operations to multiple non-volatile memory components. This approach provides significant speed advantages over prior art non-volatile protocols. Also, power consumption is reduced in comparison to prior art synchronous protocols used for volatile memory because each memory component need not be continuously selected.