Abstract: A method and apparatus of a novel full chip edge-based mask three-dimensional (3D) model for performing photolithography simulation is described. The method applies a thin mask model to a mask design layout to create a thin mask transmission. The method generates a thick mask model that has a plurality of edge-based kernels. The method applies the thick mask model to the mask design layout to create a mask 3D residual. The method combines the thin mask transmission and the mask 3D residual to create a mask 3D transmission.

Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.

Abstract: The invention provides a method of performing process window compliant corrections of a design layout. The invention includes an operator performing the following steps: (1) simulating Develop Inspect Critical Dimension (DI CD) at best exposure conditions using the provided original layout pattern; (2) simulating DI CD at predefined boundary exposure conditions using the provided original layout pattern; (3) if the DI CD from step (1) meets the target DI CD definition, and the DI CD from step (2) meets process window specifications, convergence takes place; and (4) modifying the layout pattern and repeating steps (2) through (3) until DI CD from step (2) reaches the specification limit if any portion of step (3) is not achieved.

Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.

Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.

Abstract: A method and system is provided for analyzing process window compliance of an integrated circuit design. Aspects of the present invention include identifying layout pattern configurations that have process windows that fail to meet respective local performance specifications; searching for any layout pattern configurations in a design that substantially match any of the identified layout pattern configurations; and modifying any matching layout pattern configurations found in the design to make the layout pattern configurations compliant with their respective process windows.

Abstract: A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) mask design is disclosed. The system and method of the present invention includes identifying a feature in the IC mask design, generating an isofocal contour for the identified feature, wherein the isofocal contour is a continuum of isofocal points corresponding to points on an edge of the identified feature, and utilizing the isofocal contour to estimate an amount of correction needed to produce a resist image significantly identical to the identified feature.

Abstract: One embodiment of the present invention provides a system that modifies a layout to improve manufacturing robustness. During operation, the system receives a layout. The system then selects a segment in the layout. Next, the system determines a target location in the proximity of the segment where the value of a process-sensitivity model is within a desired range of values. The system then modifies the layout so that the segment is located at the target location. The layout modification can cause the pattern which is associated with the segment to exhibit isofocal behavior, which can improve manufacturing robustness.

Abstract: A method and system for utilizing a simplified resist process model to perform optical and process corrections. More specifically, the present invention provides a fast and easy post exposure bake (PEB) effects calculation which can be used in connection with OPC. The model can be used to increase OPC modeling accuracy, by taking PEB effects into consideration, without incurring a large overhead increase due to PEB calculation cost. The method includes providing an image, calculating initial acid concentration and adding acid concentration contours to the image, calculating deprotection concentration and adding deprotection concentration contours to the image, determining latent image contour without diffusion, moving the latent image contour in a direction of lower deprotection concentration to provide the final latent image, performing OPC on the chemically amplified resist using edge movement based on the final latent image, and repeating the process to obtain convergence.

Abstract: The present invention provides methods and apparatus for accomplishing a optical direct write phase shift lithography. A lithography system and method are provided wherein a mirror array is configured to generate vortex phase shift optical patterns that are directed onto a photosensitive layer of a substrate. The lithography methods and systems facilitate pattern transfer using such vortex phase shift exposure patterns.

Abstract: A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) mask design is disclosed. The system and method of the present invention includes identifying a first feature in the mask design, generating an isofocal contour for the identified feature, and utilizing the isofocal contour to estimate an amount of correction needed to produce a resist image significantly identical to the feature.

Abstract: The present invention provides methods and apparatus for accomplishing a phase shift lithography process using a off axis light to reduce the effect of zero order light to improve the process window for maskless phase shift lithography systems and methodologies. A lithography system is provided. The lithography system provided uses off axis light beams projected onto a mirror array configured to generate a phase shift optical image pattern. This pattern is projected onto a photoimageable layer formed on the target substrate to facilitate pattern transfer.

Abstract: A method for verifying reticle enhancement technique latent image sensitivity to mask manufacturing errors. The method includes the steps of revising a polygon based on mask CD distributions to provide a virtual mask, imaging the virtual mask to obtain response function statistical parameters, and comparing the statistical parameters to design rule requirements. Preferably, the method includes the steps of simulating an aerial and/or latent image of the virtual mask, calculating response functions based on the mask image simulation, collecting measurements and calculating statistical parameters based on the response functions, and comparing the statistical parameters with design rule requirements (i.e., for DI yield percentage for required mask manufacturing specification). The virtual mask is obtained by using mask CD distribution to induce statistical variations to layouts which have passed through the conventional OPC procedure.

Abstract: The present invention provides methods and apparatus for accomplishing a phase shift lithography process using a blocker to block zero order light to improve image quality for phase shift lithography systems and methodologies. A maskless lithography system is provided. The lithography system provided uses a phase shift pattern generator which projects a phase shift image pattern along an optical path onto a photoimageable layer of a substrate in order to facilitate pattern transfer. A blocking element is interposed in the optical path to block zero order light in the image pattern, thereby improving image quality.

Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.

Abstract: A phase shift mask which includes an etched quartz region that provides a 180 degree phase shift, and an attenuated film which provides a 0 (or 360) degree phase shift. The phase shift mask provides performance comparable to CPL, while at the same time, avoiding the problems and manufacturability issues associated with EDA. The phase shift mask has better contrast than CPL, and a process window that is comparable to both CPL and alternating phase shift masks. The phase shift mask that does not require a second critical write, as is the case with CPL, does not need a second mask to eliminate unwanted patterns resulting from phase edges, and does not need a complicated EDA solution (like CPL). Finally, the phase shift mask is simple to manufacture, requiring only a single write step if employed with the back-side exposure technique which is well known in the mask-making industry.

Abstract: A binary mask and method for improving the aerial image and mask error enhancement factor (MEEF) of binary masks. A phase edge darkening binary mask is provided which has quartz etched, preferably at a depth which corresponds to a phase shift of 180 degrees. A method of manufacturing a phase edge darkening binary mask is also provided, where the method consists of changing the phase of the layout background by etching to take advantage of the phase edge darkening as a result of light leakage through chrome.

Abstract: The invention provides a method of performing process window compliant corrections of a design layout. The invention includes an operator performing the following steps: (1) simulating Develop Inspect Critical Dimension (DI CD) at best exposure conditions using the provided original layout pattern; (2) simulating DI CD at predefined boundary exposure conditions using the provided original layout pattern; (3) if the DI CD from step (1) meets the target DI CD definition, and the DI CD from step (2) meets process window specifications, convergence takes place; and (4) modifying the layout pattern and repeating steps (2) through (3) until DI CD from step (2) reaches the specification limit if any portion of step (3) is not achieved.