Abstract: A method for operating a controller, including: executing a first task-program in a first time pattern of first time-slots, performing a second task-program in a second time pattern of second time-slots, ascertaining a status variable, indicating whether a result of the first task-program is released, ascertaining the result of the first task-program in an instantaneous first time-slot and transmitted in this slot to a memory area assigned to the second task-program, the second task-program ascertains a second result as a function of the status variable value and the result of the first task-program, the status variable value is transmitted in the instantaneous time-slot to a status memory area assigned to the second task-program, the result of the first task-program and the status variables values are ascertained and transmitted after the beginning of execution of the first task-program and before another execution of the first task-program.

Abstract: A method for operating a controller, including: executing a first task-program in a first time pattern of first time-slots, performing a second task-program in a second time pattern of second time-slots, ascertaining a status variable, indicating whether a result of the first task-program is released, ascertaining the result of the first task-program in an instantaneous first time-slot and transmitted in this slot to a memory area assigned to the second task-program, the second task-program ascertains a second result as a function of the status variable value and the result of the first task-program, the status variable value is transmitted in the instantaneous time-slot to a status memory area assigned to the second task-program, the result of the first task-program and the status variables values are ascertained and transmitted after the beginning of execution of the first task-program and before another execution of the first task-program.

Abstract: A processing unit has a working memory. A direct memory access control unit includes a terminal connecting the direct memory access control unit to a bus system that connects the processing unit to the working memory and is configured to: read in, from at least two information blocks stored in the working memory and provided by the processing unit for transmission to a communication module connected to the bus system, pieces of control information characterizing respective priorities of the respective information blocks for the transmission to the communication module; ascertain a sequence for the transmission based on the respective priorities; and transmit the information blocks from the working memory to the communication module according to the ascertained sequence using a direct memory access from the working memory to the communication module.

Abstract: A processing unit has a working memory. A direct memory access control unit includes a terminal connecting the direct memory access control unit to a bus system that connects the processing unit to the working memory and is configured to: read in, from at least two information blocks stored in the working memory and provided by the processing unit for transmission to a communication module connected to the bus system, pieces of control information characterizing respective priorities of the respective information blocks for the transmission to the communication module; ascertain a sequence for the transmission based on the respective priorities; and transmit the information blocks from the working memory to the communication module according to the ascertained sequence using a direct memory access from the working memory to the communication module.

Abstract: In a method for allocating addresses in a CAN network having at least one master bus user and at least one slave bus user, the master bus user initiates the address allocation via a query message that is arranged for all bus users. Slave bus users which have already been assigned an address respond to this query message by transmitting a message at their assigned address. Slave bus users which have not yet been assigned an address take measures in response to this query message to be able to transmit on the bus without collisions, and transmit their serial number to the master bus user using these measures. At least the slave bus users which have not yet been assigned an address are assigned a suitable address by the master after receipt of the serial number, and use this address for further communication on the bus.

Abstract: A direct memory access control device for at least one computing unit includes a terminal for connecting the direct memory access control device to a bus system that connects the computing unit to a working memory, and processing circuitry configured to read out, from a source module connected to the bus system, first data of at least one information block stored at least temporarily in the source module, ascertain a target address in the working memory for the at least one information block as a function of the first data and of configuration information, and transmit the at least one information block from the source module to the target address using a direct memory access by the source module to the working memory.

Abstract: A method for programming a control unit of a motor vehicle, a previous program code executed in the control unit being stored in a memory area, a new program code being written into the control unit, and a check of this new program code being carried out, the program code being executed by the control unit if the new program code is successfully verified in the course of the check, and the previous program code stored in the memory area being written from the memory area into the control unit and the previous program code being executed by the control unit if the new program code is not successfully verified in the course of the check.

Abstract: A direct memory access control device for at least one computing unit includes a terminal for connecting the direct memory access control device to a bus system that connects the computing unit to a working memory, and processing circuitry configured to read out, from a source module connected to the bus system, first data of at least one information block stored at least temporarily in the source module, ascertain a target address in the working memory for the at least one information block as a function of the first data and of configuration information, and transmit the at least one information block from the source module to the target address using a direct memory access by the source module to the working memory.

Abstract: A method for programming a control unit of a motor vehicle, a previous program code executed in the control unit being stored in a memory area, a new program code being written into the control unit, and a check of this new program code being carried out, the program code being executed by the control unit if the new program code is successfully verified in the course of the check, and the previous program code stored in the memory area being written from the memory area into the control unit and the previous program code being executed by the control unit if the new program code is not successfully verified in the course of the check.

Abstract: In a method for allocating addresses in a CAN network having at least one master bus user and at least one slave bus user, the master bus user initiates the address allocation via a query message that is arranged for all bus users. Slave bus users which have already been assigned an address respond to this query message by transmitting a message at their assigned address. Slave bus users which have not yet been assigned an address take measures in response to this query message to be able to transmit on the bus without collisions, and transmit their serial number to the master bus user using these measures. At least the slave bus users which have not yet been assigned an address are assigned a suitable address by the master after receipt of the serial number, and use this address for further communication on the bus.