Abstract: A processing circuit has a computing cycle divided into several subcycles of uniform duration. The time base values of the last three nulls of a square wave signal produced from the sinusoidal signal of a wheel speed sensor are stored in a register with three places. At the beginning of a subcycle the difference D of the latest and of the oldest time base values stored in the register is formed and in some cases after limiting is converted to a value 1/D and stored, while the previously stored oldest value is erased. At the start of a new computing cycle the stored value 1/D is further processed as the new wheel speed.

Abstract: A processing circuit has a computing cycle divided into several subcycles of uniform duration. The time base values of the last three nulls of a square wave signal produced from the sinusoidal signal of a wheel speed sensor are stored in a register with three places. At the beginning of a subcycle the difference D of the latest and of the oldest time base values stored in the register is formed and in some cases after limiting is converted to a value 1/D and stored, while the previously stored oldest value is erased. At the start of a new computing cycle the stored value 1/D is further processed as the new wheel speed.