Abstract: A method, computer system, and a computer program product for predicting animal testing measurement levels is provided. The present invention may include referencing a human gene expression profiles data obtained under in vitro chemical treatment. The present invention may include referencing an animal measurements data obtained under in vivo chemical treatment. The present invention may include assigning an animal measurement level to a human gene expression profile by matching at least one identified compound. The present invention may include creating a chemical fingerprint of the identified compound. The present invention may include creating a machine learning feature space as a function of a human gene expression feature and a chemical fingerprint feature of the identified compound for predicting an associated animal measurement level assigned to the at least one human gene expression profile. The present invention may include training a model using the machine learning feature space.

Abstract: A method for protecting an integrated circuit device against security violations includes monitoring a component of the integrated circuit device for security violations. A security violation of the component of the integrated circuit device is then identified. The component of the integrated circuit device is then internally destroyed in response to the identified security violation by providing current to the component beyond a tolerable limit of the component.

Abstract: Fault detection for an interconnect bus includes performing safety register validation including validating correct operation of a safety register in a slave circuit. The safety register is reserved for validation operations. Write bus validation is performed where, over an address range of the slave circuit, received write addresses within the address range are stored in the safety register of the slave circuit and read back by a master circuit for validation. Read bus validation is performed where, over the address range of the slave circuit, received read addresses within the address range are provided back to the master circuit for validation.