Patents by Inventor Edmund L. Russell

Edmund L. Russell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8037447
    Abstract: A method for identifying specification window violations for a system is described. The method includes generating a sample set of input parameters. The system is simulated using the sample set to generate an output set. A mathematical model is best-fit to the output set. A set of desirability functions is defined to an out-of-spec condition. The model is then searched using the desirability functions to identify a worst-case data point. The worst-case data point can then be determined as either being within specification or out of specification.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: October 11, 2011
    Assignee: Oracle America, Inc.
    Inventor: Edmund L. Russell
  • Publication number: 20110041107
    Abstract: A method for identifying specification window violations for a system is described. The method includes generating a sample set of input parameters. The system is simulated using the sample set to generate an output set. A mathematical model is best-fit to the output set. A set of desirability functions is defined to an out-of-spec condition. The model is then searched using the desirability functions to identify a worst-case data point. The worst-case data point can then be determined as either being within specification or out of specification.
    Type: Application
    Filed: October 19, 2010
    Publication date: February 17, 2011
    Inventor: Edmund L. Russell
  • Patent number: 7844926
    Abstract: A method for identifying specification window violations for a system is described. The method includes generating a sample set of input parameters. The system is simulated using the sample set to generate an output set. A mathematical model is best-fit to the output set. A set of desirability functions is defined to an out-of-spec condition. The model is then searched using the desirability functions to identify a worst-case data point. The worst-case data point can then be determined as either being within specification or out of specification.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: November 30, 2010
    Assignee: Oracle America, Inc.
    Inventor: Edmund L. Russell
  • Patent number: 7716023
    Abstract: A system and method for deriving semiconductor manufacturing process corners using surrogate simulations is disclosed. The method may be used to determine individual performance metric yields, the number of out-of-specification conditions for a given number of simulation samples, and a total yield prediction for simultaneous multi-variable conditions. A surrogate simulation model, such as a Response Surface Model, may be generated from circuit simulation data or parametric data measurements and may be executed using a large number of multi-variable sample points to determine process corners defining yield limits for a device. The model may also be used to simulate process shifts and exaggerated input ranges for critical device parameters. In some embodiments, the derived process corners may better represent physically possible worst-case process corners than traditional general-purpose process corners, and may address differences in process sensitivities for individual circuits of the device.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: May 11, 2010
    Assignee: Oracle America, Inc.
    Inventors: Aaron J. Barker, Edmund L. Russell, III
  • Publication number: 20080195359
    Abstract: A system and method for deriving semiconductor manufacturing process corners using surrogate simulations is disclosed. The method may be used to determine individual performance metric yields, the number of out-of-specification conditions for a given number of simulation samples, and a total yield prediction for simultaneous multi-variable conditions. A surrogate simulation model, such as a Response Surface Model, may be generated from circuit simulation data or parametric data measurements and may be executed using a large number of multi-variable sample points to determine process corners defining yield limits for a device. The model may also be used to simulate process shifts and exaggerated input ranges for critical device parameters. In some embodiments, the derived process corners may better represent physically possible worst-case process corners than traditional general-purpose process corners, and may address differences in process sensitivities for individual circuits of the device.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 14, 2008
    Inventors: Aaron J. Barker, Edmund L. Russell
  • Patent number: 6687648
    Abstract: A method and computer aided system for predicting the reliability of oxide-nitride-oxide (ONO) based non-volatile memory. ONO memory devices may be programmed. Margin voltages may be recorded initially, and during baking at 100 degrees C. and 300 degrees C. From this data, constants and activation energy may be determined through a first formula. Frenkel-Poole activation energy may be determined. Through the use of a second formula, decay time of the information stored in the ONO memory may be predicted from the activation energy. The first formula may also be used to predict the decay time. The two decay time predictions may be compared to establish confidence. In this manner, data retention of an ONO memory may be reliably predicted.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: February 3, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Santosh Kumar, Edmund L. Russell