Abstract: Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to receive a plurality of sinusoidal signals. Each sinusoidal signal has a unique frequency. The band group selector selects between a plurality of band groups. The band group selector is coupled to receive a first signal from the multiplexer. The multiplexer multiplexes between the plurality of sinusoidal signals and provides the first signal. The band group selector includes a band mixer. The band mixer mixes the first signal with a band signal having a band frequency. The band signal corresponds to a band group selected from the plurality of band groups. The band group selector provides a transmitter mixer signal and a receiver mixer signal.

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit comprising a first transistor having a gate, a source and a drain, a second transistor having a gate, a source and a drain, a first capacitance coupled between the source of the first transistor and the source of the second transistor and a bias circuit having an input, a first output coupled to the source of the first transistor and a second output coupled to the source of the second transistor. The present invention may be advantageously used in a wireless transmitter application.

Abstract: Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to receive a plurality of sinusoidal signals. Each sinusoidal signal has a unique frequency. The band group selector selects between a plurality of band groups. The band group selector is coupled to receive a first signal from the multiplexer. The multiplexer multiplexes between the plurality of sinusoidal signals and provides the first signal. The band group selector includes a band mixer. The band mixer mixes the first signal with a band signal having a band frequency. The band signal corresponds to a band group selected from the plurality of band groups. The band group selector provides a transmitter mixer signal and a receiver mixer signal.

Abstract: In one embodiment the present invention includes an electrical arrangement comprising conductive elements such as electrical traces. The conductive elements carry differential signals. The conductive elements extend horizontally and have alternating sections around one or more center lines. Ground lines may be included the further enhance signal integrity. In one embodiment, magnetic field cancellation may be achieved by providing an offset between pairs of alternating differential elements.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network. In another embodiment, passive networks are coupled to the outputs of a stage, and one or more current injection circuits may be used to extend the bandwidth of the circuit.

Abstract: Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

Abstract: Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

Abstract: In one embodiment the present invention includes a method of calibrating the frequency response of a transmitter comprising generating a plurality of calibration tones across a frequency range, coupling the plurality of calibration tones to an input of said transmitter, detecting the plurality of calibration tones at an output in said transmitter, and in accordance therewith, generating a plurality of calibration values, receiving digital data to be transmitted, the digital data comprising a plurality of frequency components in said frequency range, and calibrating said frequency components of said digital data using the calibration values.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network.

Abstract: Embodiments of the present invention include wideband attenuator circuits and methods. In one embodiment the present invention includes a first divider circuit coupled in series with two or more second divider circuits. The divider circuits include resistance and capacitance values that may be set according to particular relationships. In one embodiment, a wideband attenuator may include capacitors that are selectively coupled to each output node.

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit comprising a first transistor having a gate, a source and a drain, a second transistor having a gate, a source and a drain, a first capacitance coupled between the source of the first transistor and the source of the second transistor and a bias circuit having an input, a first output coupled to the source of the first transistor and a second output coupled to the source of the second transistor. The present invention may be advantageously used in a wireless transmitter application.

Abstract: Embodiments of the present invention include wideband attenuator circuits and methods. In one embodiment the present invention includes a first divider circuit coupled in series with two or more second divider circuits. The divider circuits include resistance and capacitance values that may be set according to particular relationships. In one embodiment, a wideband attenuator may include capacitors that are selectively coupled to each output node.

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit including a bias circuit, the bias circuit comprising a first transistor having a gate, a source, and a drain, wherein the drain is coupled to a first input of the mixer circuit, a first sensing circuit coupled to the source of the first transistor, and a first comparison circuit coupled to the first sensing circuit, wherein the first comparison circuit receives a feedback signal from the first sensing circuit and a reference voltage, and in accordance therewith, generates a bias control signal to control the bias at the gate of the first transistor.

Abstract: Embodiments of the present invention include wideband attenuator circuits and methods. In one embodiment the present invention includes a first divider circuit coupled in series with two or more second divider circuits. The divider circuits include resistance and capacitance values that may be set according to particular relationships. In one embodiment, a wideband attenuator may include capacitors that are selectively coupled to each output node.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network. In another embodiment, passive networks are coupled to the outputs of a stage, and one or more current injection circuits may be used to extend the bandwidth of the circuit.

Abstract: Embodiments of the present invention include wideband attenuator circuits and methods. In one embodiment the present invention includes a first divider circuit coupled in series with two or more second divider circuits. The divider circuits include resistance and capacitance values that may be set according to particular relationships. In one embodiment, a wideband attenuator may include capacitors that are selectively coupled to each output node.

Abstract: Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit including a bias circuit, the bias circuit comprising a first transistor having a gate, a source, and a drain, wherein the drain is coupled to a first input of the mixer circuit, a first sensing circuit coupled to the source of the first transistor, and a first comparison circuit coupled to the first sensing circuit, wherein the first comparison circuit receives a feedback signal from the first sensing circuit and a reference voltage, and in accordance therewith, generates a bias control signal to control the bias at the gate of the first transistor.