Abstract: A package comprising at least one electronic chip, an encapsulant encapsulating at least part of the at least one electronic chip, a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the at least one electronic chip, and a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the at least one electronic chip, wherein at least a portion of the first electrically conductive contact structure and at least a portion of the second electrically conductive contact structure within the encapsulant are spaced in a direction between two opposing main surfaces of the package.

Abstract: A package comprising at least one electronic chip, an encapsulant encapsulating at least part of the at least one electronic chip, a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the at least one electronic chip, and a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the at least one electronic chip, wherein at least a portion of the first electrically conductive contact structure and at least a portion of the second electrically conductive contact structure within the encapsulant are spaced in a direction between two opposing main surfaces of the package.

Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, at least one electric connection structure mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment, and a mounting provision configured for mounting the electronic device at a periphery device.

Abstract: An embodiment method for fabricating electronic devices having two components connected by a metal layer includes applying a metal layer to each component and connecting the metal layers such that a single metal layer is formed.

Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, at least one electric connection structure mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment, and a mounting provision configured for mounting the electronic device at a periphery device.

Abstract: An embodiment method for fabricating electronic devices having two components connected by a metal layer includes applying a metal layer to each component and connecting the metal layers such that a single metal layer is formed.

Abstract: A semiconductor device has a circuit carrier with a number of internal contact areas is disclosed, which includes a first material with a first electrochemical potential, and a semiconductor chip with an active surface and a number of chip contact areas, which include a second material with a second electrochemical potential. Bonding wire connections are arranged between the chip contact areas and the internal contact areas of the leadframe and comprise a third material with a third electrochemical potential. The connecting points between the chip contact areas and the bonding wires and/or the connecting points between the internal contact areas and the bonding wires are coated with an anticorrosive layer.

Abstract: A semiconductor device includes a carrier such as a lead frame, a semiconductor die and an attachment member affixing the semiconductor die to the carrier. The attachment device includes an electrically conductive organic material.

Abstract: A semiconductor device includes a carrier such as a lead frame, a semiconductor die and an attachment member affixing the semiconductor die to the carrier. The attachment device includes an electrically conductive organic material.

Abstract: The invention relates to a semiconductor device (1) comprising a semiconductor chip stack (2) and a plastic housing (3), and to methods for producing the semiconductor device (1). The semiconductor device (1) is constructed on a device carrier (4), on which a first semiconductor chip (5) is fixed by its rear side (6). At least one second semiconductor chip (8) is adhesively bonded by its rear side (9) on the top side (7) of the first semiconductor chip (5) by means of an adhesive layer (10). A second plastic composition (17) is arranged between a first plastic housing composition (11) of the plastic housing (3) and the edge sides (12, 13) of the adhesive layer and the edge sides (14, 15) of the second semiconductor chip (8) and also the top side (16) of the second semiconductor chip (8) in such a way that the first plastic housing composition (11) has no physical contact with the second semiconductor chip (8) and with the adhesive layer (10).

Abstract: A semiconductor device has a circuit carrier with a number of internal contact areas is disclosed, which includes a first material with a first electrochemical potential, and a semiconductor chip with an active surface and a number of chip contact areas, which include a second material with a second electrochemical potential. Bonding wire connections are arranged between the chip contact areas and the internal contact areas of the leadframe and comprise a third material with a third electrochemical potential. The connecting points between the chip contact areas and the bonding wires and/or the connecting points between the internal contact areas and the bonding wires are coated with an anticorrosive layer.