Abstract: A circuit for generating a digital data signal from an analog input data signal is disclosed. The circuit comprises a master-slave flip-flop with a clock input for receiving the analog input data signal, an amplitude detecting circuit for detecting the amplitude of the analog input data signal and generating an amplitude detection signal in response thereto, and a phase shifting circuit responsive to the amplitude detection signal for supplying a phase shifted signal to the clock input of the master-slave flip-flop. The circuit may further include a clock recovery circuit for generating a recovered clock signal from a clock signal contained in the analog input data signal. The recovered clock signal may be supplied to the amplitude detecting circuit, or a feedback loop may supply the phase shifted clock signal to the amplitude detecting circuit.

Abstract: A circuit for generating a digital data signal from an analog input data signal is disclosed. The circuit comprises a master-slave flip-flop with a clock input for receiving the analog input data signal, an amplitude detecting circuit for detecting the amplitude of the analog input data signal and generating an amplitude detection signal in response thereto, and a phase shifting circuit responsive to the amplitude detection signal for supplying a phase shifted signal to the clock input of the master-slave flip-flop. The circuit may further include a clock recovery circuit for generating a recovered clock signal from a clock signal contained in the analog input data signal. The recovered clock signal may be supplied to the amplitude detecting circuit, or a feedback loop may supply the phase shifted clock signal to the amplitude detecting circuit.