Patents by Inventor Edward J. Cleary, Jr.

Edward J. Cleary, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6977653
    Abstract: A surround sound display has a graphic sound stage image, including speakers representing sources and a central listener, and bent correlation meter scales for each stereo channel. The correlation meter scales have values from +1 at one end to ?1 at the other end and are bent to start from a central point along one side of the display between the speakers representing the stereo channels to a point along the opposing adjacent sides of the display outside the respective speakers. A marker, either in the form of individual pointers for each scale or as a fill area that spans the scales, indicates the correlation between the stereo channels. The thickness of the fill area indicates the amplitudes of the stereo channels.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: December 20, 2005
    Assignee: Tektronix, Inc.
    Inventors: Edward J. Cleary, Jr., Steven A. Kronschnabel
  • Patent number: 6879864
    Abstract: A dual bar audio level meter for a digital audio signal with dynamic range control decodes the digital audio signal to produce a full range audio signal and control parameters. A reduced range audio signal is derived from the full range audio signal using the control parameters, and the reduced and full range audio signals are processed to present a display having a pair of bars for each channel of the digital audio signal. The dual bars may be in the form of an inner bar representing the full range audio signal and an outer bar encompassing the inner bar representing the reduced range audio signal. A dual peak indicator also may be used to provide peak information for each channel.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: April 12, 2005
    Assignee: Tektronix, Inc.
    Inventor: Edward J. Cleary, Jr.
  • Patent number: 4864167
    Abstract: A dual function peak metering circuit provides both monitoring and measuring functions for a composite signal having both modulated and unmodulated components. A full-wave rectified version of the composite signal is input to an envelope detector that drives a peak weighting circuit and a variable limiter. The output of the peak weighting circuit controls a threshold level for the variable limiter. The peaks of the signal at the output of the variable limiter are detected with an instantaneous peak-hold circuit that is periodically sampled and reset under microprocessor control. The microprocessor then displays the sampled value both graphically and numerically.
    Type: Grant
    Filed: August 1, 1988
    Date of Patent: September 5, 1989
    Assignee: Tektronix, Inc.
    Inventors: Barry A. McKibben, Edward J. Cleary, Jr.
  • Patent number: 4841200
    Abstract: A circuit for driving a display device having n display elements, where n is a positive integer greater than one, comprises a device for poviding a repetitive digital signal having a predetermined sequence of n digital values. The digital signal is converted to analog form in accordance with a predetermined transfer function and the resulting analog signal is compared with a second signal. A display enable signal is generated in the event that the magnitude of the analog signal bears a predetermined relationship to the magnitude of the second signal. A decoder circuit has a plurality of output terminals at which n distinct output signals, corresponding respectively to the n digital values, can be provided. The decoder circuit is responsive to the display enable signal for providing one of the n output signals when it receives the corresponding one of the n digital values.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: June 20, 1989
    Assignee: Tektronix, Inc.
    Inventors: Edward J. Cleary, Jr., Mike R. Coleman, Michael R. Jones
  • Patent number: 4811395
    Abstract: A two-tone test signal method for calibrating a BTSC monitoring system compensates for errors introduced into the monitoring system by unpredictable high frequency components of noise when testing the low frequency performance characteristics of the monitoring system. The two-tone test signal has a low frequency tone and a lower level high frequency tone which overrides the high frequency component of noise. The two-tone test signal is synthesized according to the BTSC specification to produce a "perfect" left-only signal for both tones.
    Type: Grant
    Filed: October 8, 1987
    Date of Patent: March 7, 1989
    Assignee: Tektronix, Inc.
    Inventors: Edward J. Cleary, Jr., Bruce E. Hofer
  • Patent number: 4686390
    Abstract: A digital peak-hold detector for determining the peak value of an input analog voltage to be displayed on a multiple-element display device detects when the value of the input analog voltage exceeds the value of a ramp-like waveform generated from a counter which repetitively counts down from a number equal to the total number of display elements to zero to generate a compare signal. A control circuit strobes the count corresponding to the peak value into a storage register when the value of the input analog voltage exceeds the current peak value in the storage register. A digital comparator compares the current peak value from the storage register with the repetitive count from the counter and outputs an update signal when the value of the count is greater than the current peak value. The update signal is combined with the compare signal by the control circuit to make the determination whether to update the current peak value.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: August 11, 1987
    Assignee: Tektronix, Inc.
    Inventors: Edward J. Cleary, Jr., Mike R. Coleman
  • Patent number: 4105932
    Abstract: A slewed-pulse display is provided for calibrating the time-base axis of an oscilloscope. In a repetitive-sweep display, the leading edges of incrementally delayed successive pulses are slewed across the display screen. Timing and linearity adjustments may be made in the time-base generator circuits so that a leading edge of a pulse is aligned with each vertically scribed graticule line overlaying the display area.
    Type: Grant
    Filed: November 24, 1976
    Date of Patent: August 8, 1978
    Assignee: Tektronix, Inc.
    Inventors: Edward J. Cleary, Jr., Michael G. Reiney