Abstract: A hybrid mode-scattering/sound-absorbing segmented liner system and method in which an initial sound field within a duct is steered or scattered into higher-order modes in a first mode-scattering segment such that it is more readily and effectively absorbed in a second sound-absorbing segment. The mode-scattering segment is preferably a series of active control components positioned along the annulus of the duct, each of which includes a controller and a resonator into which a piezoelectric transducer generates the steering noise. The sound-absorbing segment is positioned acoustically downstream of the mode-scattering segment, and preferably comprises a honeycomb-backed passive acoustic liner. The invention is particularly adapted for use in turbofan engines, both in the inlet and exhaust.

Abstract: The present invention generally relates to providing an improved jet mixer noise suppressor for high speed jets that rapidly mixes high speed air flow with a lower speed air flow, and more particularly, relates to an improved jet mixer noise suppressor that uses feedback of acoustic waves produced by the interaction of sheer flow instability waves with an obstacle downstream of the jet nozzle.

Abstract: The present invention generally relates to providing an improved jet mixer noise suppressor for high speed jets that rapidly mixes high speed air flow with a lower speed air flow, and more particularly, relates to an improved jet mixer noise suppressor that uses feedback of acoustic waves produced by the interaction of sheer flow instability waves with an obstacle downstream of the jet nozzle.

Abstract: An MOS transistor is fabricated which is especially suitable for use in the VHF and UHF regions, comprising a common source lateral MOSFET formed on a substrate, the substrate serving as the connection for the source to the header. The substrate, which is preferably P-type, has P-type and N-type epitaxial regions lying thereon and a sinker which forms a connection from source to substrate. The vertically isolated field effect transistor has a drain on top of a mesa on the N-type epitaxial region of the substrate, a gate in the contact region overhanging the edge of a channel formed adjacent to the mesa, and a source in the lateral edges of the groove defining the edge of the mesa.The process provides for simultaneous diffusion of the source and drain regions, followed by a metal masking step for connection of the diffused source which lies in the lateral edge of the groove to the sinker, effectively connecting the source to the substrate.

Abstract: A mesa structure field effect transistor includes a semiconductor body with at least one mesa formed on a major surface and an insulating layer on the mesa and overhanging the mesa. Doped regions in the side walls of the mesa define the channel region and source of the transistor, and the semiconductor body defines and drain region. Preferential etching techniques are employed in forming the mesas and the overhanging insulator. The overhanging insulator is employed as a shadow mask in fabricating the transistor.

Abstract: An MOS transistor which is suitable for use in the VHF and UHF regions is fabricated in a semiconductor substrate, with the substrate serving as the drain. A body region is formed within the substrate. A layer of insulation is formed over the surface of the device, and a via is formed in the insulation layer to expose those portions of the body region where a groove is to be cut. A groove is then formed in such a manner as to cause the insulation layer to overhang the edge of the groove. A source region is then formed in the exposed portions of the body region beneath the insulation layer. A source electrode and gate electrode are then simultaneously formed, with the overhang of the insulation layer causing the source electrode and the gate electrode to be physically and electrically separated from each other. Well known processing techniques are then used, if desired, to form a second metalization layer to serve as electrical interconnects, and to provide a scratch protection layer.

Abstract: A mesa type transistor structure is formed by using a metal mask in a semiconductor etching process whereby the mesa structure forms beneath the metal mask with the metal mask overhanging the sidewalls of the mesa. In a subsequent metal deposition step the overhanging metal layer provides a shadow mask which prevents the deposition of metal on a doped region in the mesa structure. A base contact in a bipolar structure or a gate contact in a field effect transistor structure abuts the mesa structure to provide enhanced device characteristics without shorting to the emitter or source region.

Abstract: A mesa structure field effect transistor includes a semiconductor body with at least one mesa formed on a major surface and an insulating layer on the mesa and overhanging the mesa. Doped regions in the side walls of the mesa define the channel region and source of the transistor, and the semiconductor body defines the drain region. Preferential etching techniques are employed in forming the mesas and the overhanging insulator. The overhanging insulator is employed as a shadow mask in fabricating the transistor.