Abstract: In one embodiment a system comprises an integrated circuit, a plurality of voltage regulators; and a data bus coupled to the integrated circuit and the plurality of voltage regulators. In some embodiments the integrated circuit comprises logic to embed a timing signal on the data bus. Other embodiments may be described.

Abstract: Dynamic runtime calibration of a processor with respect to a specific voltage regulator that powers the processor or a memory subsystem coupled to the processor can reduce or eliminate the need for guardbands in power management computations. The processor receives a current measurement from the voltage regulator and computes a calibration factor based on the measured value and a stored expected value. The calibration factor can be used in making power management decisions instead of adding the guardband to power readings. A manufacturer or distributor of the processor can compute the stored values with a controlled voltage supply that has a higher precision than typical commercial power supplies used in computing systems. The computed, stored values indicate the expected value, which can be used to determine a calibration factor relative to a voltage regulator of an active system.

Abstract: In one embodiment a system comprises an integrated circuit, a plurality of voltage regulators; and a data bus coupled to the integrated circuit and the plurality of voltage regulators. In some embodiments the integrated circuit comprises logic to embed a timing signal on the data bus. Other embodiments may be described.

Abstract: Dynamic runtime calibration of a processor with respect to a specific voltage regulator that powers the processor or a memory subsystem coupled to the processor can reduce or eliminate the need for guardbands in power management computations. The processor receives a current measurement from the voltage regulator and computes a calibration factor based on the measured value and a stored expected value. The calibration factor can be used in making power management decisions instead of adding the guardband to power readings. A manufacturer or distributor of the processor can compute the stored values with a controlled voltage supply that has a higher precision than typical commercial power supplies used in computing systems. The computed, stored values indicate the expected value, which can be used to determine a calibration factor relative to a voltage regulator of an active system.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the integrated circuit, and communicate with the plurality of voltage regulators that are electrically coupled to the integrated circuit at a speed associated with the slowest one of the plurality of voltage regulators.

Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the processor, transmit address information to the plurality of voltage regulators that are electrically coupled to the processor at a first speed associated with the slowest one of the plurality of voltage regulators, determine a second speed associated with a voltage regulator to which the address information is associated, and transmit a second portion of the packet at the second speed associated with the voltage regulator to which the address information is associated.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the processor, transmit address information to the plurality of voltage regulators that are electrically coupled to the processor at a first speed associated with the slowest one of the plurality of voltage regulators, determine a second speed associated with a voltage regulator to which the address information is associated, and transmit a second portion of the packet at the second speed associated with the voltage regulator to which the address information is associated.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase voltage regulator causes one or more phases of the multi-phase voltage regulator to be activated or deactivated (shed) according to predetermined criteria. Embodiments of the invention thus improve power management by providing one or more reduced power states for the memory devices. Other embodiments are described.

Abstract: Methods, systems and apparatus for a controller for fast transient response, the controller including a linear compensation circuit for controlling output voltage during steady state operation and a non-linear control circuit to generate a non-linear signal during transient periods, only a first pulse of the non-linear signal is injected during each transient period. The combination linear and non-linear control provides stability and reduces delay times for fast transient response. The non-linear control circuit includes a step up and a step down non-linear control circuit for producing the non-linear signal with a short delay time when the load voltage is less or greater than the reference voltage. An embodiment includes an adaptive circuit or generating a current signal dependent on the load current, the current signal is combined with the output voltage to reduce the difference between the reference and output voltages.

Abstract: Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase voltage regulator causes one or more phases of the multi-phase voltage regulator to be activated or deactivated (shed) according to predetermined criteria. Embodiments of the invention thus improve power management by providing one or more reduced power states for the memory devices. Other embodiments are described.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: A circuit board includes a substrate and electrical contacts to mate with a slot connector. The contacts include a first set of contacts that are associated with the communication of power and second set of contacts that are associated with the communication of signals and are not used to communicate power. Adjacent contacts of the first set have a first spacing, and adjacent contacts of the second set have a second spacing different from the first spacing. The circuit board has a retention profile to engage a retention mechanism of the slot connector. A housing of the slot connector may be made from a material that has a thermal conductivity of at least 0.27 W/m·K, and the slot connector housing may include fins that are formed on the slot connector to conduct heat away from circuitry of the circuit board.

Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble the converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.

Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble the converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.

Abstract: A system includes a junction-field-effect transistor and a transmission line. The transmission line is coupled to the transistor to communicate a supply voltage from a first end of the transmission line to a first circuit located near a second end of the transmission line. The system also includes a second circuit to control operation of the transistor to regulate a decrease in the supply voltage between the first end of the transmission and the first circuit.