Patents by Inventor Edwin Kim
Edwin Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11999805Abstract: Specific and broad-spectrum inhibitory peptides to CRISPR Cas9 variants (SpyCas9, SauCas9, and CjeCas9) are disclosed. A method of making and using these peptides with therapeutic CRISPR Cas9 (to improve desired targeting) or against harmful CRISPR Cas9 components (already active in a patient) is also disclosed. The peptides combined with a delivery system is also disclosed.Type: GrantFiled: May 6, 2020Date of Patent: June 4, 2024Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Brooke Nicole Harmon, Yooli Kim Light, Mary Bao Tran-Gyamfi, Joseph S. Schoeniger, Edwin A. Saada, Kenneth L. Sale
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Patent number: 11989182Abstract: A data analysis system for measuring a materiality feature of interest is disclosed. The system includes a computing cluster ingesting content comprising a plurality of observables relevant to an entity, wherein each observable is related to at least one feature of interest. The system further includes an extraction engine running on the computing cluster and tagging the observables with an entity identifier in response to the observables referencing at least one of an entity, a tradename associated with the entity, or product associated with the entity. Additionally, the system includes an analysis engine running on the computing cluster and tagging an observable in response to the feature of interest being related to the observable. In one embedment, the analysis engine measures the materiality of the feature of interest to the entity by counting a number of observables from the plurality of observables tagged with the entity identifier.Type: GrantFiled: January 12, 2021Date of Patent: May 21, 2024Assignee: TruValue Labs, INC.Inventors: Greg Paul Bala, Michael Alfred Flowers, Adam L. Salvatori, Sebastian Brinkmann, Stephen Malinak, Eli Reisman, Andrew Shipley, Mark Strehlow, Hendrik Bartel, Philip Kim, James Hawley, Edwin Kuh
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Patent number: 11978494Abstract: A method of operating a memory device that includes the steps of receiving a read command and a target address in a non-volatile memory (NVM) array, in which the NVM array is divided into a plurality of blocks based on row and column addresses, performing a read operation on NVM cells in the target address and coupling an output of each NVM cell read to a sensing circuit, generating a local reference voltage based on a base reference voltage and an adjustment reference voltage corresponding to the target address of the NVM cells being read and a block that the NVM cells belong thereto, and offsetting the base reference voltage with the adjustment reference voltage, and coupling the local reference voltage to the sensing circuit. Other embodiments are also described.Type: GrantFiled: February 17, 2023Date of Patent: May 7, 2024Assignee: Infineon Technologies LLCInventors: Edwin Kim, Alan D. Devilbiss, Kapil Jain, Patrick F. O'Connell, Franklin Brodsky, Shan Sun, Fan Chu
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Publication number: 20230267983Abstract: A method of operating a memory device that includes the steps of receiving a read command and a target address in a non-volatile memory (NVM) array, in which the NVM array is divided into a plurality of blocks based on row and column addresses, performing a read operation on NVM cells in the target address and coupling an output of each NVM cell read to a sensing circuit, generating a local reference voltage based on a base reference voltage and an adjustment reference voltage corresponding to the target address of the NVM cells being read and a block that the NVM cells belong thereto, and offsetting the base reference voltage with the adjustment reference voltage, and coupling the local reference voltage to the sensing circuit. Other embodiments are also described.Type: ApplicationFiled: February 17, 2023Publication date: August 24, 2023Applicant: Infineon Technologies LLCInventors: Edwin KIM, Alan D. DEVILBISS, Kapil JAIN, Patrick F. O'CONNELL, Franklin BRODSKY, Shan SUN, Fan CHU
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Patent number: 11587603Abstract: A memory device including a reference voltage (VREF) generator and method for operating the same to improve memory sensing margin, and extend operational temperature range and life of the device are disclosed. Generally, the device further includes an array of non-volatile memory cells divided into a plurality of blocks, a sensing circuit coupled to the array to receive and compare memory signals therefrom to the VREF to read data from the cells. The Local reference voltage generator is configured to provide one of a number of reference voltages to the sensing circuit based on which of the blocks is being read. The array can be divided based on row and column addresses of cells in the blocks. Where the cells include 1T1C ferroelectric random access memory (F-RAM) cells, and the reference voltages are selected based on a lowest P-term or highest U-term of the cells in the block being read.Type: GrantFiled: December 15, 2020Date of Patent: February 21, 2023Assignee: INFINEON TECHNOLOGIES LLCInventors: Edwin Kim, Alan DeVilbiss, Kapil Jain, Patrick O'Connell, Franklin Brodsky, Shan Sun, Fan Chu
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Publication number: 20220101904Abstract: A memory device including a reference voltage (VREF) generator and method for operating the same to improve memory sensing margin, and extend operational temperature range and life of the device are disclosed. Generally, the device further includes an array of non-volatile memory cells divided into a plurality of blocks, a sensing circuit coupled to the array to receive and compare memory signals therefrom to the VREF to read data from the cells. The Local reference voltage generator is configured to provide one of a number of reference voltages to the sensing circuit based on which of the blocks is being read. The array can be divided based on row and column addresses of cells in the blocks. Where the cells include 1T1C ferroelectric random access memory (F-RAM) cells, and the reference voltages are selected based on a lowest P-term or highest U-term of the cells in the block being read.Type: ApplicationFiled: December 15, 2020Publication date: March 31, 2022Applicant: Infineon Technologies LLCInventors: Edwin Kim, Alan DeVilbiss, Kapil Jain, Patrick O'Connell, Franklin Brodsky, Shan Sun, Fan Chu
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Patent number: 10312575Abstract: Antennas for wearable wireless devices are provided. A wearable wireless device antenna may include a primary radiating element configured to form at least a portion of a wearable device body and a secondary radiating element configured to couple to the primary radiating element. Each of the primary and secondary radiating elements may be configured to radiate in differing frequency ranges. Wearable device antennas as provided may further be configured as directional antennas.Type: GrantFiled: March 31, 2015Date of Patent: June 4, 2019Assignee: GALTRONICS USA, INC.Inventors: Bumjin (Martin) Kim, Sunkil (Edgar) Choi, Jae Hun (Daniel) Gim, Sangyup (Andrea) Kim, Suhyun (Edwin) Kim, Jaeyun (Louis) Hwang
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Publication number: 20170025743Abstract: Antennas for wearable wireless devices are provided. A wearable wireless device antenna may include a primary radiating element configured to form at least a portion of a wearable device body and a secondary radiating element configured to couple to the primary radiating element. Each of the primary and secondary radiating elements may be configured to radiate in differing frequency ranges. Wearable device antennas as provided may further be configured as directional antennas.Type: ApplicationFiled: March 31, 2015Publication date: January 26, 2017Applicant: GALTRONICS CORPORATION LTD.Inventors: Bumjin (Martin) KIM, Sunkil (Edgar) CHOI, Jae Hun (Daniel) GIM, Sangyup (Andrea) KIM, Suhyun (Edwin) KIM, Jaeyun (Louis) HWANG
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Patent number: 6271592Abstract: The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MNx), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition.Type: GrantFiled: August 6, 1999Date of Patent: August 7, 2001Assignee: Applied Materials, Inc.Inventors: Edwin Kim, Michael Nam, Chris Cha, Gongda Yao, Sophia Lee, Fernand Dorleans, Gene Y. Kohara, Jianming Fu
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Patent number: 5985759Abstract: The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MN.sub.x), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition.Type: GrantFiled: February 24, 1998Date of Patent: November 16, 1999Assignee: Applied Materials, Inc.Inventors: Edwin Kim, Michael Nam, Chris Cha, Gongda Yao, Sophia Lee, Fernand Dorleans, Gene Y. Kohara, Jianming Fu