Abstract: In an embodiment, a circuit comprising an oscillator is provided. The oscillator is controlled based on a feedback value and an input reference value. The feedback value or the reference value or both are generated using noise shaping.

Abstract: Implementations of differential variable capacitance systems are disclosed.

Abstract: In an embodiment, a circuit comprising an oscillator is provided. The oscillator is controlled based on a feedback value and an input reference value. The feedback value or the reference value or both are generated using noise shaping.

Abstract: The voltage controlled oscillator (VCO) circuit comprises a tank circuit, a first tuning section comprising first capacitor elements wherein each one of the first capacitor elements is individually utilizable for the tank circuit, and a second tuning section comprising second capacitor elements wherein each one of the second capacitor elements is individually utilizable for the tank circuit and the capacitance of each one of the second capacitor elements is continuously adjustable in a predetermined capacitance range in dependence on a tuning voltage.

Abstract: A delay stage for a semiconductor device includes at least one delay branch and at least one controllable switching apparatus. The at least one controllable switching apparatus is configured to connect a predefined amount of the at least one delay branch to a supply voltage.

Abstract: The voltage controlled oscillator (VCO) circuit comprises a tank circuit, a first tuning section comprising first capacitor elements wherein each one of the first capacitor elements is individually utilizable for the tank circuit, and a second tuning section comprising second capacitor elements wherein each one of the second capacitor elements is individually utilizable for the tank circuit and the capacitance of each one of the second capacitor elements is continuously adjustable in a predetermined capacitance range in dependence on a tuning voltage.

Abstract: A device for extracting a clock frequency underlying a data stream includes means for controlling a controllable oscillator, coarse-tuning means and fine-tuning means, wherein coarse-tuning means responds to a second data pattern present in the data stream and sets the oscillator coarsely based on its length. Fine-tuning means responds to temporally consecutive first data patterns present in the data stream with a higher accuracy in order to perform a fine tuning of the oscillator on the basis of the temporal length between the two first data patterns and on the basis of the number of clock cycles of the controllable oscillator occurring in this temporal length.

Abstract: A delay stage for a semiconductor device includes at least one delay branch and at least one controllable switching apparatus. The at least one controllable switching apparatus is configured to connect a predefined amount of the at least one delay branch to a supply voltage.

Abstract: A digitally controllable oscillator includes an oscillation generation means and an oscillator control, wherein the oscillator control comprises two digital/analog converters whose output signals are combined by a combiner in order to generate an analog input signal into the oscillation generation means. The second digital/analog converter is implemented in order to provide, in response to a digital increment in its digital input signal, a difference in the output signal of the second digital/analog converter which is smaller than a difference in the output signal of the first digital/analog converter when the first digital/analog converter is pulsed with the digital increment in its digital input signal.

Abstract: A digitally controllable oscillator includes an oscillation generation means and an oscillator control, wherein the oscillator control comprises two digital/analog converters whose output signals are combined by a combiner in order to generate an analog input signal into the oscillation generation means. The second digital/analog converter is implemented in order to provide, in response to a digital increment in its digital input signal, a difference in the output signal of the second digital/analog converter which is smaller than a difference in the output signal of the first digital/analog converter when the first digital/analog converter is pulsed with the digital increment in its digital input signal.

Abstract: A device for extracting a clock frequency underlying a data stream includes means for controlling a controllable oscillator, coarse-tuning means and fine-tuning means, wherein coarse-tuning means responds to a second data pattern present in the data stream and sets the oscillator coarsely based on its length. Fine-tuning means responds to temporally consecutive first data patterns present in the data stream with a higher accuracy in order to perform a fine tuning of the oscillator on the basis of the temporal length between the two first data patterns and on the basis of the number of clock cycles of the controllable oscillator occurring in this temporal length.