Patents by Inventor Eigo Tange

Eigo Tange has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10438731
    Abstract: An inductor includes first and second wirings respectively formed in a substantially spiral shape on first and second surfaces of a multilayer substrate. The multilayer substrate includes plural dielectric layers stacked on each other in a predetermined direction. The multilayer substrate includes a first layer having the first surface, which is an end surface in the predetermined direction, and a second layer having the second surface within the multilayer substrate. The width of the second wiring is smaller than that of the first wiring. The first and second wirings are electrically connected in parallel with each other. The inductance of the first wiring and that of the second wiring are substantially equal to each other. When the first and second wirings are projected on the first surface in the predetermined direction, entirety of a projected image of the second wiring is contained within that of the first wiring.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: October 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takeyuki Okabe, Eigo Tange, Takayuki Tsutsui
  • Publication number: 20190006075
    Abstract: An inductor includes first and second wirings respectively formed in a substantially spiral shape on first and second surfaces of a multilayer substrate. The multilayer substrate includes plural dielectric layers stacked on each other in a predetermined direction. The multilayer substrate includes a first layer having the first surface, which is an end surface in the predetermined direction, and a second layer having the second surface within the multilayer substrate. The width of the second wiring is smaller than that of the first wiring. The first and second wirings are electrically connected in parallel with each other. The inductance of the first wiring and that of the second wiring are substantially equal to each other. When the first and second wirings are projected on the first surface in the predetermined direction, entirety of a projected image of the second wiring is contained within that of the first wiring.
    Type: Application
    Filed: July 3, 2018
    Publication date: January 3, 2019
    Inventors: Takeyuki OKABE, Eigo TANGE, Takayuki TSUTSUI
  • Patent number: 10009059
    Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: June 26, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hayato Nakamura, Eigo Tange, Tadashi Matsuoka, Yasushi Shigeno
  • Publication number: 20160308575
    Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.
    Type: Application
    Filed: June 30, 2016
    Publication date: October 20, 2016
    Inventors: Hayato NAKAMURA, Eigo TANGE, Tadashi MATSUOKA, Yasushi SHIGENO
  • Patent number: 9444512
    Abstract: Reduction of intermodulation distortion in a high-frequency switch is achieved. A semiconductor device (1) includes an antenna terminal (ANT_LB), plural external terminals (RX_LB, TX_LB, TRX_LB, TERM_LB), plural first high-frequency switches (101 to 104), and plural control terminals. Each first high-frequency switch includes plural first field-effect transistors, plural first resistors (Rg_1 to Rg_6) connected to the gate terminals of the first field-effect transistors, and a second resistor (Rc) disposed between the corresponding control terminal and the first resistors. The second resistor in the first high-frequency switch disposed between the first terminal supplied with an RF transmission signal and an RF reception signal of a frequency division duplex system and the antenna terminal is configured so that linearity of current-voltage characteristics thereof is higher than linearity of current-voltage characteristics of the first resistor.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: September 13, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Eigo Tange, Shigeki Koya, Yasushi Shigeno, Akishige Nakajima
  • Patent number: 9413415
    Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: August 9, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hayato Nakamura, Eigo Tange, Tadashi Matsuoka, Yasushi Shigeno
  • Publication number: 20140370827
    Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.
    Type: Application
    Filed: December 14, 2012
    Publication date: December 18, 2014
    Inventors: Hayato Nakamura, Eigo Tange, Tadashi Matsuoka, Yasushi Shigeno
  • Publication number: 20140328223
    Abstract: Reduction of intermodulation distortion in a high-frequency switch is achieved. A semiconductor device (1) includes an antenna terminal (ANT_LB), plural external terminals (RX_LB, TX_LB, TRX_LB, TERM_LB), plural first high-frequency switches (101 to 104), and plural control terminals. Each first high-frequency switch includes plural first field-effect transistors, plural first resistors (Rg—1 to Rg—6) connected to the gate terminals of the first field-effect transistors, and a second resistor (Rc) disposed between the corresponding control terminal and the first resistors. The second resistor in the first high-frequency switch disposed between the first terminal supplied with an RF transmission signal and an RF reception signal of a frequency division duplex system and the antenna terminal is configured so that linearity of current-voltage characteristics thereof is higher than linearity of current-voltage characteristics of the first resistor.
    Type: Application
    Filed: November 26, 2012
    Publication date: November 6, 2014
    Inventors: Eigo Tange, Shigeki Koya, Yasushi Shigeno, Akishige Nakajima
  • Patent number: 8169008
    Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: May 1, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
  • Patent number: 7995972
    Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: August 9, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno
  • Publication number: 20110031533
    Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.
    Type: Application
    Filed: October 21, 2010
    Publication date: February 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
  • Patent number: 7838914
    Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: November 23, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
  • Publication number: 20080299914
    Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.
    Type: Application
    Filed: August 5, 2008
    Publication date: December 4, 2008
    Applicant: Renesas Technology Corporation
    Inventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno
  • Patent number: 7437129
    Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: October 14, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno
  • Patent number: 7425876
    Abstract: An object of the present invention is to provide an antenna switch circuit that effectively reduces signal leakages at a cross point even at higher operating frequencies and a high frequency module containing said antenna switch module. The antenna switch circuit comprises: a high frequency signal line to transmit a transmitting signal to be input to transmitting terminals to an antenna terminal and also to transmit a receiving signal to be input to the antenna terminal to receiving terminals; switches that are connected in the middle of the high frequency signal line between transmitting terminal and antenna terminal; switches that are connected in the middle of the high frequency signal line between receiving terminal and antenna terminal; and signal lines to transmit control signals for controlling turning on and off of the switches.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: September 16, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Ogawa, Shinichiro Takatani, Akishige Nakajima, Yasushi Shigeno, Eigo Tange
  • Publication number: 20080073671
    Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.
    Type: Application
    Filed: November 6, 2007
    Publication date: March 27, 2008
    Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
  • Publication number: 20080042776
    Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 21, 2008
    Inventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno
  • Patent number: 7312482
    Abstract: The present invention is directed to improve high frequency characteristics by reducing inductance of a source. In an HEMT assembled in a power amplifier device, each of a drain electrode, a source electrode, and a gate electrode is constructed by a base portion and a plurality of fingers projected in a comb-teeth shape from the base portion, and the fingers of the electrodes mesh with each other. In the source electrode, a width of the fingers positioned at both ends of the plurality of fingers is wider than a width of each of the fingers positioned between both ends. The width of each of the fingers positioned at both ends is a width equal to or larger than a sum of the widths of the plurality of fingers positioned between both ends, and the width of the base portion is wider than that of each of the fingers positioned at both ends. An electrode pad provided for the source base portion and an external electrode terminal are connected to each other via a conductive wire.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: December 25, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Akishige Nakajima, Hidenori Suenaga, Eigo Tange
  • Patent number: 7307298
    Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: December 11, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
  • Patent number: 7269392
    Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: September 11, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno