Patents by Inventor Eiichi Asayama

Eiichi Asayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7014704
    Abstract: A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1×1013 atoms/cm3–1×1015 atoms/cm3 with a cooling rate of not less than 2.5° C./min at a crystal temperature of 1150° C.–1000° C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than ? of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9×1017 atoms/cm3 (ASTM '79). With this method, the silicon single crystal, in which the generation of Grown-in defects can be effectively suppressed, can be produced in a simple process without any increase in the production cost.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: March 21, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Tadami Tanaka, Shigeru Umeno, Eiichi Asayama, Hideshi Nishikawa
  • Patent number: 6878451
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment, which is a factor for increasing the number of production steps and production costs.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 12, 2005
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo
  • Patent number: 6835245
    Abstract: Epitaxial wafers showing marked IG effects can be manufactured from silicon single crystals doped or not doped with nitrogen without requiring any additional heat treatment process step while reducing the density of epitaxial layer defects. According to the first manufacturing method, an epitaxial layer is allowed to grow on the surface of a wafer sliced from a single crystal produced by employing a cooling rate of not less than 7.3° C./min in the temperature range of 1200-1050° C. in the step of pulling up thereof. According to the second manufacturing method, an epitaxial layer is allowed to grow on the surface of a silicon wafer sliced from a silicon single crystal doped with 1×1012 atoms/cm3 to 1×1014 atoms/cm3 as produced by employing a cooling rate of not less than 2.7° C./min in the temperature range of 1150-1020° C. and then a cooling rate of not more than 1.2° C./min in the temperature range of 1000-850° C. in the step of pulling up thereof.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: December 28, 2004
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Tadami Tanaka, Eiichi Asayama, Hideshi Nishikawa, Masataka Horai
  • Publication number: 20040244674
    Abstract: A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1×1013 atoms/cm3-1×1015 atoms/cm3 with a cooling rate of not less than 2.5° C./min at a crystal temperature of 1150° C.-1000° C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than ⅗ of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9×1017 atoms/cm3 (ASTM '79).
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Toshiaki Ono, Tadami Tanaka, Shigeru Umeno, Eiichi Asayama, Hideshi Nishikawa
  • Publication number: 20040216659
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer.
    Type: Application
    Filed: May 19, 2004
    Publication date: November 4, 2004
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo
  • Patent number: 6709957
    Abstract: The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1×1013 atoms/cm3 of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700° C. but lower than 900° C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11×1017 atoms/cm3. Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 23, 2004
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Yasuo Koike, Tadami Tanaka, Toshiaki Ono, Masataka Horai, Hideshi Nishikawa
  • Patent number: 6641888
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016−5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: November 4, 2003
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Masataka Horai, Shigeru Umeno, Shinsuke Sadamitsu, Yasuo Koike, Kouji Sueoka, Hisashi Katahama
  • Publication number: 20030175532
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo
  • Patent number: 6569237
    Abstract: A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050° C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950° C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: May 27, 2003
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Tadami Tanaka, Toshiaki Ono, Eiichi Asayama
  • Publication number: 20030008447
    Abstract: The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1×1013 at ms/cm3 of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700° C. but lower than 900° C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11×1017 atoms/cm3. Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot.
    Type: Application
    Filed: June 18, 2002
    Publication date: January 9, 2003
    Inventors: Eiichi Asayama, Yasuo Koike, Tadami Tanaka, Toshiaki Ono, Masataka Horai, Hideshi Nishikawa
  • Publication number: 20020142170
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016−5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer.
    Type: Application
    Filed: January 25, 2002
    Publication date: October 3, 2002
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo, Shigeru Umeno, Shinsuke Sadamitsu, Yasuo Koike, Kouji Sueoka, Hisashi Katahama
  • Publication number: 20020142171
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer.
    Type: Application
    Filed: January 25, 2002
    Publication date: October 3, 2002
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo, Shigeru Umeno, Shinsuke Sadamitsu, Yasuo Koike, Kouji Sueoka, Hisashi Katahama
  • Patent number: 6365461
    Abstract: Methods are designed to manufacture an epitaxial wafer wherein the formation of defects in an epitaxial layer is sufficiently suppressed even if the epitaxial wafer is prepared from a silicon single crystal which is grown while doped with nitrogen. Specifically, the methods are to grow an epitaxial layer on a wafer sliced from (1) a silicon single crystal wherein the oxygen concentration at an OSF ring region is 9×1017 atoms/cm3 or less, (2) a silicon single crystal wherein the inside diameter of an OSF ring region is located at a position which is 85% or more of the wafer diameter, and (3) a silicon single crystal doped with nitrogen at a concentration between 1×1012 atoms/cm3 or more and 1×1014 atoms/cm3 or less.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: April 2, 2002
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Eiichi Asayama, Shigeru Umeno, Masataka Hourai
  • Publication number: 20020017234
    Abstract: Epitaxial wafers showing marked IG effects can be manufactured from silicon single crystals doped or not doped with nitrogen without requiring any additional heat treatment process step while reducing the density of epitaxial layer defects. According to the first manufacturing method, an epitaxial layer is allowed to grow on the surface of a wafer sliced from a single crystal produced by employing a cooling rate of not less than 7.3° C./min in the temperature range of 1200-1050° C. in the step of pulling up thereof. According to the second manufacturing method, an epitaxial layer is allowed to grow on the surface of a silicon wafer sliced from a silicon single crystal doped with 1×1012 atoms/cm3 to 1×1014 atoms/cm3 as produced by employing a cooling rate of not less than 2.7° C./min in the temperature range of 1150-1020° C. and then a cooling rate of not more than 1.2° C./min in the temperature range of 1000-850° C. in the step of pulling up thereof.
    Type: Application
    Filed: June 20, 2001
    Publication date: February 14, 2002
    Applicant: Sumitomo Metal Industries, Ltd., Osaka-shi, Japan
    Inventors: Toshiaki Ono, Tadami Tanaka, Eiichi Asayama, Hideshi Nishikawa, Masataka Horai
  • Publication number: 20020000189
    Abstract: A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050° C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950° C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.
    Type: Application
    Filed: June 21, 2001
    Publication date: January 3, 2002
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Tadami Tanaka, Toshiaki Ono, Eiichi Asayama