Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A radio frequency identification (RFID) device includes: a contact interface for wired communication with a host; a contactless interface for contactless communication with a reader/writer; a command processing unit that obtains a command from the reader/writer in the contactless communication and process the command, the command instructing a data access; and a memory that holds data. The command processing unit determines a communication mode, and (i) executes the data access instructed in the command between the reader/writer and the memory, when the communication mode is determined as a first communication mode, and (ii) executes the data access instructed in the command between the reader/writer and the host, when the communication mode is determined as a second communication mode.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A radio frequency identification (RFID) device includes: a contact interface for wired communication with a host; a contactless interface for contactless communication with a reader/writer; a command processing unit that obtains a command from the reader/writer in the contactless communication and process the command, the command instructing a data access; and a memory that holds data. The command processing unit determines a communication mode, and (i) executes the data access instructed in the command between the reader/writer and the memory, when the communication mode is determined as a first communication mode, and (ii) executes the data access instructed in the command between the reader/writer and the host, when the communication mode is determined as a second communication mode.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: In a single-wire data communication characterized in that a data communication unit time is different in accordance with the polarity of a signal, a communication control time is dependent on a communication data pattern, and hence, the control of the whole system is difficult. A counter for counting a clock continues the counting until a count value thereby obtained reaches a predetermined upper limit value, retains the predetermined upper limit value as the count value until a next pulse is detected in a reception signal after the count value reaches the predetermined upper limit value, and initializes the count value when the next pulse is detected. A data value judger judges a data value depending on whether or not the pulse is detected during a period before the time when the count value reaches the predetermined upper limit value.

Abstract: The present invention is applicable to various sensor outputs including pulse signals and reduces cost for detecting malfunction. The malfunction detection system detects a malfunction in a sensor, and the malfunction detection system includes a sensor including a first terminal, and which outputs a sensor output current that varies a voltage level of the first terminal, a current output unit which varies the voltage level of the first terminal by outputting a constant current for judging to the sensor via the first terminal, and a judging unit which judges that the sensor is malfunctioning when the current for judging causes the voltage level of the first terminal to be equal to or higher than a threshold in a period different from a first period where the sensor output current causes the voltage level of the first terminal to be equal to or higher than the threshold.

Abstract: In a single-wire data communication characterized in that a data communication unit time is different in accordance with the polarity of a signal, a communication control time is dependent on a communication data pattern, and hence, the control of the whole system is difficult. A counter for counting a clock continues the counting until a count value thereby obtained reaches a predetermined upper limit value, retains the predetermined upper limit value as the count value until a next pulse is detected in a reception signal after the count value reaches the predetermined upper limit value, and initializes the count value when the next pulse is detected. A data value judger judges a data value depending on whether or not the pulse is detected during a period before the time when the count value reaches the predetermined upper limit value.

Abstract: A semiconductor device includes a comparator which includes two input terminals and compares the voltage values between the power supply voltage which is inputted to one side input terminal and the reference voltage which is inputted to the other side input terminal. A resistor element connects two signal lines that are connected to the input terminals of the comparator One end of a capacitance element is connected to a power supply terminal for applying a power supply and the other end is connected to one input terminal of the comparator.

Abstract: The present invention is applicable to various sensor outputs including pulse signals and reduces cost for detecting malfunction. The malfunction detection system detects a malfunction in a sensor, and the malfunction detection system includes a sensor including a first terminal, and which outputs a sensor output current that varies a voltage level of the first terminal, a current output unit which varies the voltage level of the first terminal by outputting a constant current for judging to the sensor via the first terminal, and a judging unit which judges that the sensor is malfunctioning when the current for judging causes the voltage level of the first terminal to be equal to or higher than a threshold in a period different from a first period where the sensor output current causes the voltage level of the first terminal to be equal to or higher than the threshold.

Abstract: A frequency sensor includes at least one a resistor element and a capacitor. A frequency is detected according to a charging/discharging time to/from the capacitor, thereby realizing a frequency sensor with reduced power consumption and reduced circuit scale. Further, plural resistors and plural capacitors can be provided, along with switches connected to the respective resistors and capacitors. Additionally, a time constant can be adjusted after production, whereby variations in production can be reduced. Furthermore, a self-diagnosis circuit can be included for determining whether the frequency sensor itself operates normally or not. Thus, a highly-reliable frequency sensor can be realized.

Abstract: As a countermeasure against operating an LSI with a frequency out of an allowed range, there is a frequency sensor that generates reference clocks and detects the frequency by counting the reference clocks. In this method, however, power consumption and circuit scale are undesirably increased. So, in the present invention, a resistor element (13) and a capacitor (14) are provided, and a frequency is detected according to a charging/discharging time to/from the capacitor (14), thereby realizing a frequency sensor with reduced power consumption and reduced circuit scale. Further, when plural resistors and plural capacitors are provided and switches are connected to the respective resistors and capacitors, the time constant can be adjusted after production, whereby variations in production can be reduced. Furthermore, when a self-diagnosis circuit for determining whether the frequency sensor itself operates normally or not is provided, a highly-reliable frequency sensor can be realized.

Abstract: A semiconductor device of the present invention includes a comparator (1) which includes two input terminals (N1), (N2), and compares the voltage values between the power supply voltage which is inputted to one side input terminal and the reference voltage which is inputted to the other side input terminal, a resister element (2) which connects the signal line (L1) which is connected the input terminal (N1) of the comparator (1) and the signal line (L2) which is the input terminal (N2) of the comparator (1), and a capacitance element (3) one end of which is connected to a power supply terminal for applying a power supply and the other end of which is connected to one input terminal of the comparator (2). Thereby, a step variation of a power supply voltage can be detected without depending on the power supply voltage before the voltage variation.

Abstract: To provide an IC chip for contactless IC card that ensures reliabilities such as data retention of nonvolatile memory and reduces power consumption. Power supply voltages VDD and VSS, which are output from a rectifier circuit, are used as a power supply for driving an analog circuit, digital circuit, and memory control circuit to cause them to operate at low voltages. A booster circuit is provided for generating a power supply voltage VDDM, which is a boost voltage, to drive a memory circuit. Because the memory circuit can be operated at the same, high voltage and the other circuits can be operated at lower voltages than voltages that would be used in a case where the analog circuit, digital circuit, memory control circuit and memory circuit are driven by a common power supply, power consumption can be reduced.

Abstract: An object is to enable the reference level to be generated without the use of a dummy cell in a ferroelectric memory device having a single-transistor, single-capacitor memory cell structure. To achieve this object, a P-type MOS transistor is additionally connected between two nodes which are control terminals of a sense amplifier, and an offset is generated in the sense amplifier. To one of the nodes, a sense amplifier control signal is directly input, and to the other node, the sense amplifier control signal is input through the P-type MOS transistor. The offset level of the sense amplifier is set by setting the potential of the offset control signal which is the gate input of the P-type MOS transistor. Consequently, the reference level can be generated without the use of a dummy cell. As a result, a high-speed, high-reliability ferroelectric memory device can be provided.

Abstract: An object is to enable the reference level to be generated without the use of a dummy cell in a ferroelectric memory device having a single-transistor, single-capacitor memory cell structure. To achieve this object, a P-type MOS transistor is additionally connected between two nodes which are control terminals of a sense amplifier, and an offset is generated in the sense amplifier. To one of the nodes, a sense amplifier control signal is directly input, and to the other node, the sense amplifier control signal is input through the P-type MOS transistor. The offset level of the sense amplifier is set by setting the potential of the offset control signal which is the gate input of the P-type MOS transistor. Consequently, the reference level can be generated without the use of a dummy cell. As a result, a high-speed, high-reliability ferroelectric memory device can be provided.

Abstract: To provide an IC chip for contactless IC card that ensures reliabilities such as data retention of nonvolatile memory and reduces power consumption. Power supply voltages VDD and VSS, which are output from a rectifier circuit, are used as a power supply for driving an analog circuit, digital circuit, and memory control circuit to cause them to operate at low voltages. A booster circuit is provided for generating a power supply voltage VDDM, which is a boost voltage, to drive a memory circuit. Because the memory circuit can be operated at the same, high voltage and the other circuits can be operated at lower voltages than voltages that would be used in a case where the analog circuit, digital circuit, memory control circuit and memory circuit are driven by a common power supply, power consumption can be reduced.