Abstract: The present invention relates to a node, a packet communication network, and a packet communication method and program. The node of the present invention is one which includes a section which advertises to other nodes link state information which indicates the state of links which are connected to this node, a section which establishes a packet forwarding path according to the link state information which is included in the advertisement by the advertisement section, and a traffic observation section which observes the traffic and outputs its observations as traffic observation results.

Abstract: The present invention relates to a node which is used in the structure of an optical communication network. This node has a signal transmission function for performing data transfer and a signal receiving function for performing data signal reception, and includes a unit for establishing and releasing a cut through path to a next stage node. Moreover, it includes a unit for detecting the arrival of a leading packet of burst data, and the unit for establishing and releasing the cut through path includes a unit for establishing a cut through path to the next stage node, when the arrival of a leading packet of burst data is detected by the leading packet arrival detection unit.

Abstract: An ATM switch includes a plurality of stages in which each stage has basic switches and the stages are interconnected. The ATM switch includes M×N basic switches per each stage and a part for interconnecting between the stages. The M×N basic switches are divided into N groups. The part connects an output port of each basic switch at a front stage to M input ports of the basic switches at a back stage. At the output port, a wavelength-multiplexing part is used, and, at the input port, a wavelength-demultiplexing part is used. Further, a wavelength-switching part for switching optical signals of M wavelength-multiplexed optical signals arriving from the M wavelength-multiplexing part and outputting the switched wavelength-multiplexed optical signals to the M wavelength-demultiplexing part is used.

Abstract: This invention relates to a node, comprising a data transferring function for transferring data, a data receiving function for receiving data, and an establishing unit for establishing and releasing a cut through path to a node of a next stage; the establishment and releasing unit comprising a calculating unit which calculates in advance establishment paths of a cut through path to each of a plurality of nodes in the next stage, and a detecting unit which detects the arrival of a leading packet of burst data; and the calculating unit calculating establishment paths of a plurality of cut through paths in accordance with an IP address of the leading packet, detected by the detecting unit.

Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.

Abstract: A Pipelined-based Maximal-sized Matching (PMM) scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with a maximal matching scheme. In the PMM approach, arbitration may operate in a pipelined manner. Each subscheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides the matching result. The subscheduler can adopt a pre-existing efficient maximal matching algorithm such as iSLIP and DRRM. PMM maximizes the efficiency of the adopted arbitration scheme by allowing sufficient time for a number of iterations. PMM preserves 100% throughput under uniform traffic and fairness for best-effort traffic.

Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.

Abstract: A multiple phase cell dispatch scheme, in which each phase uses a simple and fair (e.g., round robin) arbitration methods, is described. VOQs of an input module and outgoing links of the input module are matched in a first phase. An outgoing link of an input module is matched with an outgoing link of a central module in a second phase. The arbiters become desynchronized under stable conditions which contributes to the switch's high throughput characteristic. Using this dispatch scheme, a scalable multiple-stage switch able to operate at high throughput, without needing to resort to speeding up the switching fabric and without needing to use buffers in the second stage, is possible. The cost of speed-up and the cell out-of-sequence problems that may occur when buffers are used in the second stage are therefore avoided. A hierarchical arbitration scheme used in the input modules reduces the time needed for scheduling and reduces connection lines.

Abstract: A multiple phase cell dispatch scheme, in which each phase uses a simple and fair (e.g., round robin) arbitration methods, is described. VOQs of an input module and outgoing links of the input module are matched in a first phase. An outgoing link of an input module is matched with an outgoing link of a central module in a second phase. The arbiters become desynchronized under stable conditions which contributes to the switch's high throughput characteristic. Using this dispatch scheme, a scalable multiple-stage switch able to operate at high throughput, without needing to resort to speeding up the switching fabric and without needing to use buffers in the second stage, is possible. The cost of speed-up and the cell out-of-sequence problems that may occur when buffers are used in the second stage are therefore avoided.

Abstract: A contention control circuit which temporarily stores cells arriving from a respective plurality of input lines to output cells to a single output line without collisions. The contention control circuit compares, at each input line in turn, the priority of the cell that has arrived from that input line, with the priority of the cell selected from among the cells that have arrived from preceding input lines as the cell having the highest priority, and again selects the cell with the higher priority.

Abstract: An ATM switch includes a plurality of input line corresponding units, a plurality of output line corresponding units, and a wavelength shifting unit. The wavelength shifting unit is arranged between the input line corresponding units and the output line corresponding units to shift optical signals having different wavelengths in a plurality of wavelength-multiplexed optical signals arriving from the input line corresponding units and output the wavelength-multiplexed optical signals. Each input line corresponding unit includes an input-side basic switch for distributing N (N is a positive integer) cells respectively input to input ports to N lines, an electro-optic converter for converting the cells into optical signals having different wavelengths in units of N lines, and a multiplexer for multiplexing the optical signals into one wavelength-multiplexed optical signal.

Abstract: In order to establish virtual channel networks on an ATM network, a different virtual channel handler interconnection network for each media or service consisting of information to be transferred is established on a virtual path network; and virtual channel networks corresponding to these media or services are formed by the respective virtual channel handler interconnection networks, whereby a plurality of independent virtual channel networks for different media or services are established simultaneously on a single physical network.

Abstract: A device and method for designing a reliable communication network using disjoint paths with no shared links or nodes. An adjacency matrix is copied to a temporary adjacency matrix, and when it has been confirmed by matrix calculation that there is a path or paths between the origin and destination nodes, a path is obtained backwards and links in the path are deleted. The search for a path is repeated using the resulting temporary adjacency matrix. In this way, the actual number of disjoint paths is never overestimated. Rapid calculation is possible by means of a super-computer.