Abstract: An organic EL display device includes scanning lines, video signal lines, and pixels, each including a TFT having a semiconductor layer and an organic EL layer located between a lower electrode and an upper electrode. A source electrode connecting the semiconductor layer and the lower electrode is formed of three layers including a barrier metal, an Al-containing metal, and a cap metal. The barrier metal is formed of a first layer in contact with the semiconductor layer and a second layer in contact with the Al-containing metal. Each of the first layer, the second layer, and the cap metal is formed of a metal comprising a high melting point metal, and an amount of oxygen in the first layer is larger than an amount of oxygen in the second layer.

Abstract: An organic EL display device includes scanning lines, video signal lines, and pixels, each including a TFT having a semiconductor layer and an organic EL layer located between a lower electrode and an upper electrode. A source electrode connecting the semiconductor layer and the lower electrode is formed of three layers including a barrier metal, an Al-containing metal, and a cap metal. The barrier metal is formed of a first layer in contact with the semiconductor layer and a second layer in contact with the Al-containing metal. Each of the first layer, the second layer, and the cap metal is formed of a metal comprising a high melting point metal, and an amount of oxygen in the first layer is larger than an amount of oxygen in the second layer.

Abstract: A contact resistance in a through-hole with a source or a drain electrode connected to a TFT is decreased, thereby improving the operation efficiency of a display device. In the through-hole, a source portion of the TFT is connected to a source electrode 8. The source electrode 8 is formed of three layers comprising a barrier metal, an Al alloy 82, and a cap metal 83. The barrier metal is divided into a lower layer 81a in contact with the semiconductor layer and an upper layer 81b in contact with the Al alloy. The lower layer 81a of the barrier metal is formed by sputtering, the lower layer 81a is heat-treated and, subsequently, an upper layer 81b of the base metal, the Al alloy 82, and the cap metal 83 are formed continuously by sputtering. Since the upper layer 81b of the barrier metal in contact with the Al alloy 82 is not oxidized, increase in the contact resistance in the through-hole can be prevented.

Abstract: Provided is a display device including a p-type thin film transistor formed on a substrate, in which the p-type thin film transistor includes: a gate electrode; a drain electrode; a source electrode; an insulating film; a semiconductor layer formed on a top surface of the gate electrode through the insulating film; and diffusion layers of p-type impurities formed at each of an interface between the drain electrode and the semiconductor layer and an interface between the source electrode and the semiconductor layer, the drain electrode and the source electrode being formed so as to be opposed to each other with a clearance formed therebetween on a top surface of the semiconductor layer.

Abstract: A contact resistance in a through-hole with a source or a drain electrode connected to a TFT is decreased, thereby improving the operation efficiency of a display device. In the through-hole, a source portion of the TFT is connected to a source electrode 8. The source electrode 8 is formed of three layers comprising a barrier metal, an Al alloy 82, and a cap metal 83. The barrier metal is divided into a lower layer 81a in contact with the semiconductor layer and an upper layer 81b in contact with the Al alloy. The lower layer 81a of the barrier metal is formed by sputtering, the lower layer 81a is heat-treated and, subsequently, an upper layer 81b of the base metal, the Al alloy 82, and the cap metal 83 are formed continuously by sputtering. Since the upper layer 81b of the barrier metal in contact with the Al alloy 82 is not oxidized, increase in the contact resistance in the through-hole can be prevented.

Abstract: In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline la

Abstract: In a display device which forms thin film transistors on a substrate, the thin film transistor includes an n-type thin film transistor and a p-type thin film transistor, a gate electrode of one thin film transistor out of the n-type thin film transistor and the p-type thin film transistor forms a metal layer made of a material different from the gate electrode on a gate-insulation-film side thereof, and an LDD layer is formed over a semiconductor layer of at least one of the n-type thin film transistor and the p-type thin film transistor.

Abstract: In a display device manufacturing method including a step of forming a semiconductor film above a substrate and a step of implanting an impurity to each of a first semiconductor film in a first region of the substrate, a second semiconductor film in a second region outside the first region, and a third semiconductor film in a third region outside the first and second regions, the implanting step includes implanting an impurity in the third region so as to form a capacitor.

Abstract: Improvement in characteristics of a SELAX-TFT and throughput of ELA crystallization is achieved. When a thin film transistor using pseudo single crystal semiconductor and a thin film transistor using particulate polysilicon semiconductor are formed on a single substrate, the film thickness of an amorphous semiconductor film before crystallization in the pseudo single crystal semiconductor portion is greater than that in the polysilicon semiconductor portion.

Abstract: In a display device which forms thin film transistors on a substrate, the thin film transistor includes an n-type thin film transistor and a p-type thin film transistor, a gate electrode of one thin film transistor out of the n-type thin film transistor and the p-type thin film transistor forms a metal layer made of a material different from the gate electrode on a gate-insulation-film side thereof, and an LDD layer is formed over a semiconductor layer of at least one of the n-type thin film transistor and the p-type thin film transistor.

Abstract: Provided is a display device including a p-type thin film transistor formed on a substrate, in which the p-type thin film transistor includes: a gate electrode; a drain electrode; a source electrode; an insulating film; a semiconductor layer formed on a top surface of the gate electrode through the insulating film; and diffusion layers of p-type impurities formed at each of an interface between the drain electrode and the semiconductor layer and an interface between the source electrode and the semiconductor layer, the drain electrode and the source electrode being formed so as to be opposed to each other with a clearance formed therebetween on a top surface of the semiconductor layer.

Abstract: The present invention provides a fabrication method of a display device which aims at the reduction of fabricating man-hours.

Abstract: The present invention provides a manufacturing method of a display device which can decrease the lowering of a yield rate of the display device attributed to the aggregations generated by pseudo single crystallization of a silicon film. A manufacturing method of a display device includes a semiconductor film reforming step which reforms a semiconductor film into a second state in which the semiconductor film possesses elongated crystalline particles by radiating a laser beam to the semiconductor film in a first state, an aggregation detecting step which detects the aggregation of the semiconductor film which is generated in the semiconductor film reforming step, and a defect determination step which determines a product as a defective product when a position of the aggregation is present in the inside of the predetermined region and determines the product as a good product when the position of the aggregation is present outside the predetermined region.

Abstract: A bipolar transistor is provided in which both the base resistance and the base-collector capacitance are reduced and which is capable of operating at a high cutoff frequency. The semiconductor device is structured so that the emitter and extrinsic base are separated from each other by an insulator sidewall and the bottom faces of the insulator sidewall, and the emitter are approximately on the same plane. The extrinsic base electrode and the collector region are separated from each other by an insulator.

Abstract: In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline la

Abstract: A display device includes a capacitive element configured so that a portion of a semiconductor layer which is made conductive constitutes one electrode, an insulation film which covers the semiconductor layer constitutes a dielectric film, and a conductive layer which includes a portion which is formed over the insulation film and is overlapped to the one electrode constitutes another electrode. The conductive layer has an extension portion which extends outside of a region where the semiconductor layer is formed from the inside of the region where the semiconductor layer is formed, and is formed over the insulation film. The insulation film has, in a region where the insulation film is overlapped to both the semiconductor layer and the extension portion of the conductive layer, a film thickness which is larger than a film thickness at a portion thereof which is overlapped to the one electrode.

Abstract: The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.

Abstract: The present invention provides a manufacturing method of a display device which can prevent the reduction of a size of a pseudo single-crystalline region having strip-like crystals in forming such a pseudo single-crystalline silicon region on a substrate. A step for forming pseudo single crystals having strip-like crystals on a preset region of a semiconductor film formed on a substrate includes a step for forming the pseudo single crystal by radiating an energy beam to a first region of the semiconductor film while moving a radiation position of the energy beam in a first direction, and a step for forming the pseudo single crystal by radiating the energy beam to a second region of the semiconductor film while moving a radiation position of the energy beam in a second direction opposite to the first direction.

Abstract: With the present invention, it is possible to provide a high quality image display by suppressing such faults as malfunction of a circuit or leakage of a current due to hump caused by the characteristic of a thin film transistor at a channel edge portion. An edge portion 302 of a polysilicon layer 301 functioning as a channel layer is converted into a noncrystalline or fine crystalline area. Because a silicon semiconductor film at the channel edge portion 302 is in the fine crystalline or noncrystalline state, a current flowing there is extremely small, or a current does not flow there. Thus, even when a threshold voltage Vth at a channel central portion is different from that at a channel edge portion, performance of the entire thin film transistor film is little affected, so that display faults due to hump are prevented.

Abstract: Improvement in characteristics of a SELAX-TFT and throughput of ELA crystallization is achieved. When a thin film transistor using pseudo single crystal semiconductor and a thin film transistor using particulate polysilicon semiconductor are formed on a single substrate, the film thickness of an amorphous semiconductor film before crystallization in the pseudo single crystal semiconductor portion is greater than that in the polysilicon semiconductor portion.