Abstract: According to the present disclosure, a semiconductor device includes a semiconductor substrate of a first conductivity type, in which a cell region, a ballast resistor region, and a termination region surrounding the ballast resistor region are defined, a first insulating film arranged on a front surface of the semiconductor substrate, having a first opening in the cell region, and having at least one second opening in the ballast resistor region, a second insulating film filled in the at least one second opening, a first impurity layer of a second conductivity type arranged on the front surface of the semiconductor substrate below the first opening, and a second impurity layer of the second conductivity type arranged on the front surface of the semiconductor substrate below the at least one second opening, a conductive film arranged from the front surface of the first opening of the semiconductor substrate to the termination region.

Abstract: An n?-type semiconductor substrate (1) includes an active region and a terminal region disposed outside the active region. A p+-type anode layer (2) is formed in a portion of an upper surface of the n?-type semiconductor substrate (1) in the active region. A plurality of p+-type guard ring layers (3) are formed in a portion of the upper surface of the n?-type semiconductor substrate (1) in the terminal region. An n+-type cathode layer (5) is formed in a lower surface of the n?-type semiconductor substrate (1). An anode electrode (6) is connected to the p+-type anode layer (2). A metallic cathode electrode (7) is connected to the n+-type cathode layer (5). A recess (8) is formed by trenching the n+-type cathode layer (5) in the terminal region. The cathode electrode (7) is also formed in the recess (8).

Abstract: A method of testing a semiconductor device having a substrate in and on which a cell structure and a termination structure are formed, the cell structure having a main current flowing therethrough, the termination structure surrounding the cell structure, the method includes a first test step of testing dielectric strength of the semiconductor device, a charge removal step of, after the first test step, removing charge from a top surface layer of the termination structure, the top surface layer being located on the substrate and formed of an insulating film or a semi-insulating film, and a second test step of, after the charge removal step, testing dielectric strength of the semiconductor device.

Abstract: An n?-type semiconductor substrate (1) includes an active region and a terminal region disposed outside the active region. A p+-type anode layer (2) is formed in a portion of an upper surface of the n?-type semiconductor substrate (1) in the active region. A plurality of p+-type guard ring layers (3) are formed in a portion of the upper surface of the n?-type semiconductor substrate (1) in the terminal region. An n+-type cathode layer (5) is formed in a lower surface of the n?-type semiconductor substrate (1). An anode electrode (6) is connected to the p+-type anode layer (2). A metallic cathode electrode (7) is connected to the n+-type cathode layer (5). A recess (8) is formed by trenching the n+-type cathode layer (5) in the terminal region. The cathode electrode (7) is also formed in the recess (8).

Abstract: A semiconductor device includes a semiconductor substrate having one main surface in which an anode of a diode is formed. At a distance from the outer periphery of the anode, a guard ring is formed to surround the anode. The anode includes a p+-type diffusion region, a p?-type region, and an anode electrode. The p?-type region is formed as a region of relatively high electrical resistance sandwiched between the p+-type diffusion regions.

Abstract: A semiconductor device manufacturing method according to the present invention includes a step of arranging a plurality of processing objects on a first tray and a second tray adjacent to the first tray, a plurality of application steps in which application of an application substance to the plurality of processing objects is repeated a certain number of times by emitting the application substance from an application device formed right above a contact position at which the first tray and the second tray contact each other, by swinging the application device along a first direction across the contact position, and by moving the first tray and the second tray in a second direction perpendicular to the first direction, and an interchange step of interchanging the first tray and the second tray in position without changing the directions of the first tray and the second tray corresponding to the second direction, the interchange step being executed at least one time among the plurality of application steps.

Abstract: A semiconductor device manufacturing method according to the present invention includes a step of arranging a plurality of processing objects on a first tray and a second tray adjacent to the first tray, a plurality of application steps in which application of an application substance to the plurality of processing objects is repeated a certain number of times by emitting the application substance from an application device formed right above a contact position at which the first tray and the second tray contact each other, by swinging the application device along a first direction across the contact position, and by moving the first tray and the second tray in a second direction perpendicular to the first direction, and an interchange step of interchanging the first tray and the second tray in position without changing the directions of the first tray and the second tray corresponding to the second direction, the interchange step being executed at least one time among the plurality of application steps.

Abstract: A method of testing a semiconductor device having a substrate in and on which a cell structure and a termination structure are formed, the cell structure having a main current flowing therethrough, the termination structure surrounding the cell structure, the method includes a first test step of testing dielectric strength of the semiconductor device, a charge removal step of, after the first test step, removing charge from a top surface layer of the termination structure, the top surface layer being located on the substrate and formed of an insulating film or a semi-insulating film, and a second test step of, after the charge removal step, testing dielectric strength of the semiconductor device.

Abstract: The present invention includes a semiconductor substrate and a back electrode (a back multilayer electrode in the preferred embodiment) provided on a back surface of the semiconductor substrate. A rough source pattern is formed in a peripheral edge portion of the back surface of the semiconductor substrate which faces the back multilayer electrode.

Abstract: A semiconductor device includes a semiconductor substrate having one main surface in which an anode of a diode is formed. At a distance from the outer periphery of the anode, a guard ring is formed to surround the anode. The anode includes a p+-type diffusion region, a p?-type region, and an anode electrode. The p?-type region is formed as a region of relatively high electrical resistance sandwiched between the p+-type diffusion regions.